FAN4860 Fairchild Semiconductor, FAN4860 Datasheet - Page 11

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FAN4860

Manufacturer Part Number
FAN4860
Description
The FAN4860 is a low-power boost regulator designed to provide a regulated 5V output from a single cell Li-Ion battery
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2010 Fairchild Semiconductor Corporation
FAN4860 • Rev. 1.1.0
Functional Description
Circuit Description
FAN4860 is a synchronous boost regulator, typically operating
at 3MHz in continuous conduction mode (CCM), which occurs
at moderate to heavy load current and low V
At light-load currents, the converter switches automatically to
power-saving PFM mode. The regulator automatically and
smoothly
continuous conduction PWM mode and variable-frequency
PFM mode to maintain the highest possible efficiency over
the full range of load current and input voltage.
PWM Mode Regulation
The FAN4860 uses a minimum on-time and computed
minimum off-time to regulate V
excellent transient response by employing current mode
modulation. This technique causes the regulator output to
exhibit a load line. During PWM mode, the output voltage
drops slightly as the input current rises. With a constant V
this appears as a constant output resistance.
The “droop” caused by the output resistance when a load is
applied allows the regulator to respond smoothly to load
transients with negligible overshoot.
V
regulator is in PWM mode (continuous conduction) as:
For example, at V
drop to:
At V
V
V
V
OUT
OUT
OUT
OUT
IN
=2.3V, and I
700
600
500
400
300
200
100
as a function of I
=
=
=
2.0
. 5
. 5
. 5
05
05
05
transitions
Figure 36.
R
. 0
. 0
2.5
OUT
38
68
LOAD
IN
=3.3V, and I
0
0
=200mA, V
I
2 .
2 .
LOAD
3.0
=
=
LOAD
. 4
. 4
between
Output Resistance (
Input Voltage (V)
974
914
can be computed when the
3.5
OUT
V
V
OUT
LOAD
. The regulator achieves
would drop to:
=200mA, V
quasi-fixed-frequency
4.0
IN
voltages.
ROUT
4.5
OUT
)
3.3 Vout
5.0 Vout
would
5.0
(1A)
(1B)
(1)
IN
,
11
PFM Mode
If V
regulator enters PFM mode. Boost pulses are inhibited until
V
the output to pump up sufficiently with each PFM boost
pulse. Therefore, the regulator behaves like a constant on-
time regulator, with the bottom of its output voltage ripple at
5.05V in PFM mode.
Table 1.
Shutdown and Startup
If EN is LOW, all bias circuits are off and the regulator is in
shutdown mode. During shutdown, true load disconnect
between battery and load prevents current flow from V
V
LIN State
When EN rises, if V
bring V
current source from V
630mA during LIN1 mode.
If V
initiated. Otherwise, LIN1 times out after 16 CLK counts and
the LIN2 mode is entered.
In LIN2 mode, the current source is incremented to 850mA.
If V
condition is declared.
SS State
Upon the successful completion of the LIN state (V
1V), the regulator begins switching with boost pulses current
limited to about 50% of nominal level, incrementing to full
scale over a period of 32 CLK counts.
If the output fails to achieve 90% of its setpoint within 96 CLK
counts at full-scale current limit, a fault condition is declared.
BST State
This is the normal operating mode of the regulator. The
regulator uses a minimum t
scheme. Minimum t
the regulator’s switching frequency reasonably constant in
CCM. t
current reaches 0 before t
To ensure that V
regulation point, the boost switch remains off as long as
FB > V
Mode
OUT
OUT
BST
LIN
SS
OUT
OUT
OUT
, as well as reverse flow from V
< V
ON(MIN)
REF
OUT
> V
reaches V
fails to reach V
REF
.
within about 1V of V
REF
Boost Operating Mode
Operating States
. The minimum on-time is increased to enable
is proportional to V
Boost Soft-Start
when the minimum off-time has ended, the
Linear Startup
Description
OUT
IN
IN
OFF
-1V during LIN1 mode, the SS state is
does not pump significantly above the
IN
> UVLO, the regulator first attempts to
is proportional to
(I
IN
OFF(MIN)
LIN1
-1V after 64 CLK counts, a fault
). The current is limited to about
OFF
IN
IN
during the prior cycle.
-minimum t
and is higher if the inductor
by using the internal fixed
OUT
to V
Invoked When:
V
www.fairchildsemi.com
V
OUT
V
IN
V
IN
V
OUT
.
OUT
IN
ON
, which keeps
> V
< V
=V
modulation
OUT
REG
REG
OUT
>V
IN
IN
to
-

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