FAN5355 Fairchild Semiconductor, FAN5355 Datasheet
FAN5355
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FAN5355 Summary of contents
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... During startup, the IC controls the output slew rate to minimize input current and output overshoot at the end of soft start. The IC maintains a consistent soft-start ramp, regardless of output ® , ATI) load during startup. The FAN5355 is available in 10-lead MLP (3x3mm) and 12-bump WLCSP packages. November 2011 synchronous step-down DC-DC 2 C™ ...
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... Minimum L incorporates tolerance, temperature, and partial saturation effects (L decreases with increasing current). 4. Minimum function of initial tolerance, maximum temperature, and the effective capacitance being reduced due to frequency, dielectric, and voltage bias effects. © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 Output LSB Current V Programming ...
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... All logic inputs (SDA, SCL, SYNC, EN, and VSEL) are high impedance and should not be left floating. For minimum quiescent power consumption, tie unused logic inputs to AVIN or AGND © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 Bottom View 2 C interface serial data. ...
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... P 9. This thermal data is measured with high-K board (four-layer board according to JESD51-7 JEDEC standard). © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 ( long as the pull-up voltage for SDA and SCL is less than 2.5V. If voltage HD ...
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... Thermal Shutdown Hysteresis HYST Frequency Control f Oscillator Frequency SW f Synchronization Range SYNC D Synchronization Duty Cycle SYNC © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 Conditions I = 0mA, PFM Mode 0mA, 3MHz PWM Mode GND EN_DCDC bit = 0, IN SDA = SCL = V ...
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... OUT Load Regulation I LOAD V OUT Line Regulation Output Ripple Voltage RIPPLE © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) Conditions Forced PWM, V OUT(DC) OUT 2.7V ≤ V ≤ 5.5V, V from 0.75 to 1.5375, IN OUT 800mA, Forced PWM OUT(DC) 2.7V ≤ V ≤ ...
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... Option 03 and 06 slew rates are 35.5V/ms during the first 16s of soft start. AVIN EN VSEL SYNC INTERFACE AND LOGIC SDA SCL 3 MHz Osc © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) Conditions Monotonicity Assured by Design R = 75, Transition from 1.0 to LOAD 1.5375V, V Settled to within 2% of Set Point OUT R > 5 1.8000V ...
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... START Condition and After ACK Bit t SDA Fall Time FDA t Stop Condition Setup Time SU;STO C Capacitive Load for SDA and SCL B © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 Conditions Standard Mode Fast Mode High-Speed Mode, C < 100pF B High-Speed Mode, C < 400pF B Standard Mode ...
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... HD;STA REPEATED START = MCS Current Source Pull- Resistor Pull-up P Note A: First rising edge of SCLH after Repeated Start and after each ACK bit. © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 t SU;STA T SU;DAT HD;DAT t HD;STA 2 C Interface Timing for Fast and Slow Modes ...
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... Auto PWM/PFM 70 % Forced PWM tpu t Curre nt (mA) LOAD Figure 9. Efficiency vs. Load at V © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 = 3.6V 25°C, and recommended components as specified in Table 100 % 3. 1.05V ...
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... Figure 13. Load Regulation 2.0 2.5 3.0 3.5 VIN Input Voltage (V) Figure 15. Quiescent Current, I © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 = 3.6V 25°C, and recommended components as specified in Table 1.364 1.362 1.360 1.358 1.356 1.354 1.352 1.350 1.348 100 1000 = 1.05V Figure 12 ...
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... Typical Performance Characteristics Unless otherwise specified 3.6V Load Transient Response Figure 17. 50mA to 400mA to 50mA, Forced PWM Figure 19. 400mA to 750mA to 400mA, Auto PWM/PFM © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) = 1.35V, and load step < 100ns. OUT R F Figure 18. 50mA to 400mA to 50mA, Auto PWM/PFM Figure 20 ...
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... Typical Performance Characteristics Unless otherwise specified 3.6V. IN VSEL Transitions Figure 21. Single-Step, R Figure 23. Single-Step, R © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) = 6.2Ω LOAD = 50Ω LOAD 13 Figure 22. Single-Step 6.2Ω LOAD Figure 24. Single-Step 50Ω LOAD www.fairchildsemi.com ...
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... IN VSEL Transitions Figure 25. Single-Step from Forced PWM (MODE1=0), R LOAD Figure 27. Single–Step from Auto PWM/PFM (MODE1=1), R LOAD © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) = 50Ω Figure 28. Multi-Step, Controlled DAC Step (9.6mV/µs) = 50Ω 14 Figure 26. Single-Step 6.2Ω LOAD ...
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... Typical Performance Characteristics R is switched with N-channel MOSFET from VOUT to GND. V LOAD Short Circuit and Over-Current Fault Response Figure 29. Metallic Short Applied at VOUT Figure 31. R LOAD © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) = 3.6V, initial 660mΩ 1.35V, initial I = 0mA. OUT LOAD Figure 30 ...
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... Typical Performance Characteristics Unless otherwise specified 3.6V. IN Figure 33. SW-Node Jitter (Infinite Persistence), I LOAD Figure 35. Soft Start, R © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 (Continued) Figure 34. SW-Node Jitter, External Synchronization = 200mA (10) = 50 LOAD 16 (Infinite Persistence), I LOAD IOUT=500mA ...
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... Circuit Description Overview The FAN5355 is a synchronous buck regulator that typically operates at 3MHz with moderate to heavy load currents. At light load currents, the converter operates in power-saving PFM mode. The regulator automatically transitions between fixed-frequency PWM and variable-frequency PFM mode to maintain the highest possible efficiency over the full range of load current ...
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... Some vendors provide both “Light PFM” (LPFM) and “Fast 1.3625 1.8000 PFM” (FPFM) modes, while the FAN5355 provides only one 1.3750 1.8125 PFM mode. The FAN5355’s single PFM mode features the 1.3875 1.8250 fast transient recovery of FPFM, but does this with the low 1.4000 1.8375 quiescent current consumption similar to LPFM mode ...
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... Positive Transitions When transitioning to a higher V OUT the transition using multi-step or single-step mode. © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 Multi-Step Mode: Applies to Options 03 and 06 only. The internal DAC is stepped at a rate defined by DEFSLEW, CONTROL2[2:0], ranging from 000 to 110. This mode ...
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... FAN5355 • Rev. 1.1 Interface The FAN5355’s serial interface is compatible with standard, fast, and HS mode I SCL line is an input and its SDA line is a bi-directional open- drain output; it can only pull down the bus when active. The SDA line only pulls LOW during data reads and when signaling ACK ...
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... SDA NACK(1) SCL Figure 43. Stop Bit During a read from the FAN5355 (Figure 46), the master issues a “Repeated Start” after sending the register address and before resending the slave address. The “Repeated Start” transition on SDA while SCL is HIGH, as shown in Figure 44 ...
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... Register Descriptions Default Values Each option of the FAN5355 (see Ordering Information on page 2) has different default values for the some of the register bits. Table 10 defines both the default values and the bit’s type (as defined in Table 11) for each available option. VSEL0 Option ...
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... OUT 110 slews at 9.60mV/ s during positive V V OUT A 111 Positive V © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 . OUT . OUT VSEL1 when VSEL is HIGH, and VSEL0 when VSEL is LOW. OUT transition if HW_nSW = 0. This bit must be written by the external master to 1 for the next V OUT is not discharged ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 A (Ø0.25 PAD D 0 ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . © 2008 Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 3 3.0 ...
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... Fairchild Semiconductor Corporation FAN5355 • Rev. 1.1.0 26 www.fairchildsemi.com ...