FDMF6705B Fairchild Semiconductor, FDMF6705B Datasheet
FDMF6705B
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FDMF6705B Summary of contents
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... MOSFET plus driver power stage solution for high-current, high- frequency, synchronous buck DC-DC applications. The FDMF6705B integrates a driver IC, two power MOSFETs, and a bootstrap Schottky diode into a thermally enhanced, ultra-compact 6x6mm PQFN package. With an integrated approach, the complete switching ...
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... UVLO DISB# 10µA V CIN R UP_PWM Input 3-State PWM Logic R DN_PWM THWN# Temp. Sense CGND © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 VDRV VCIN VIN R BOOT DISB# BOOT PWM FDMF6705B PHASE SMOD# VSWH THWN# CGND PGND Figure 1. Typical Application Circuit VDRV ...
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... LOW). This pin has a 10µA internal pull-down current source. Do not add a noise filter capacitor. 40 PWM PWM signal input. This pin accepts a three-state logic-level PWM signal from the controller. © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 Figure 4. Top View Description 3 www.fairchildsemi.com ...
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... MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application Information” and “PCB Layout Guidelines” sections of this datasheet for additional information. © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 Parameter Referenced to CGND Referenced to CGND ...
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... High-Level Input Voltage IH_SMOD V Low-Level Input Voltage IL_SMOD I Pull-Up Current PLU t Propagation Delay PD_SLGLL t Propagation Delay PD_SHGLH © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0 5V, and T = +25°C unless otherwise noted. CIN DRV A Condition PWM=LOW or HIGH or Float Q VCIN VDRV ...
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... Exiting 3-State Propagation t PD_TSGLH Delay Boot Diode V Forward-Voltage Drop F V Breakdown Voltage R © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0 5V, and T = +25°C unless otherwise noted. CIN DRV A Condition I =5mA PLD SW=0V, Delay Between GH from HIGH to LOW and GL from LOW to HIGH ...
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... V IH_PWM PWM VSWH VSWH t PD PHGLL t D_DEADON © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 90% 1.0V 10 PLGHL Figure 5. PWM Timing Diagram 7 V IL_PWM 10% 90% 1.2V t D_TIMEOUT ( 250ns Timeout) 2.2V t D_DEADOFF www.fairchildsemi.com ...
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... Output Current, I Figure 8. Module Power Loss vs. Output Current 1. 30A 300kHz OUT SW 1.15 1.10 1.05 1.00 0. Module Input Voltage, V Figure 10. Normalized Power Loss vs. Input Voltage © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 =1.0V, V =5V, V =5V, L =320nH, T CIN DRV OUT 1MHz ...
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... Module Switching Frequency, f Figure 14. Driver Supply Current vs. Frequency 1.10 1.08 1.06 1.04 1.02 1.00 0. Module Output Current, I Figure 16. Normalized Driver Supply Current vs. Output Current © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 (Continued) =1.0V, V =5V, V =5V, L =320nH, T CIN DRV OUT 1.05 1.04 1.03 1.02 1.01 1.00 0.99 0.98 2.5 3.0 3.5 (V) OUT 12 11 ...
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... Driver IC Junction Temperature ( Figure 20. SMOD# Thresholds vs. Temperature 2 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 4.50 4.75 5.00 Driver Supply Voltage, V Figure 22. DISB# Thresholds vs. Driver Supply Voltage © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 (Continued) =1.0V, V =5V, V =5V, L =320nH, T CIN DRV OUT 2.2 2.0 1.8 V 1.6 TRI_LO 1.4 V IL_PWM 1.2 75 100 125 150 4. Figure 19 ...
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... Typical Performance Characteristics Test Conditions: V =12V OUT unless otherwise specified. Figure 24. DISB# Pull-Down Current vs. Temperature © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 (Continued) =1.0V, V =5V, V =5V, L =320nH, T CIN DRV OUT 11 CIN 11.0 I PLD 10.5 10.0 9.5 -50 - Driver IC Junction Temperature =25° ...
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... PWM input goes from three-state to LOW, the low- side MOSFET is turned on. If the PWM input goes from Driver State three-state to HIGH, the high-side MOSFET is turned on. This is illustrated in Figure 26. The FDMF6705B design allows for short propagation delays when exiting the three-state window (see Electrical Characteristics). Low-Side Driver ...
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... LS V PD_SHGLH GS IH_SMOD © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 To preclude overlap during the HIGH-to-LOW transition (Q1 off to Q2 on), the adaptive circuitry monitors the voltage at the VSWH pin. When the PWM signal goes LOW, Q1 turns off after a propagation delay (t Once the VSWH pin falls below ~2 ...
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... VSWH 2.2V VSWH GL 90% 1. PD_PLGHL PD_PHGLL t t D_DEADOFF D_DEADON © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 Table 2. DISB disables SMOD 1 Note: 4. The SMOD feature is intended to have low propagation delay between the SMOD signal and the low-side FET V diode emulation on a cycle-by-cycle basis ...
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... ON Open - Drain Output © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 VCIN Filter The VDRV pin provides power to the gate drive of the high-side and low-side power MOSFETs. In most cases, VDRV can be connected directly to VCIN, which supplies power to the logic circuitry of the gate driver. ...
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... DrMOS cooling acceptable noise emission output inductor should be located close to the FDMF6705B to minimize the power loss due to the VSWH copper trace. Care should also be taken so the inductor dissipation does not heat the DrMOS. ® 4. PowerTrench MOSFETs are used in the output stage ...
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... Top View © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 Figure 30. PCB Layout Example 17 Bottom View www.fairchildsemi.com ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2011 Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 B PIN#1 INDICATOR 6.00 ...
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... Fairchild Semiconductor Corporation FDMF6705B • Rev. 1.0.2 19 www.fairchildsemi.com ...