FSL206MR Fairchild Semiconductor, FSL206MR Datasheet - Page 3
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FSL206MR
Manufacturer Part Number
FSL206MR
Description
The FSL206MR integrated Pulse Width Modulator (PWM) and SenseFET is specifically designed for highperformance offline Switch Mode Power Supplies (SMPS) with minimal external components
Manufacturer
Fairchild Semiconductor
Datasheet
1.FSL206MR.pdf
(14 pages)
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© 2010 Fairchild Semiconductor Corporation
FSL206MR • Rev. 1.0.2
Pin Configuration
Pin Definitions
6, 7, 8
Pin #
1
2
3
4
5
Name
Drain
GND
V
V
V
LS
STR
CC
FB
Description
Ground. Sense FET source terminal on primary side and internal control ground.
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (V
Diagram section). It is not until V
startup switch opens and device power is supplied via the auxiliary transformer winding.
Feedback Voltage. Non-inverting input to the PWM comparator. With a 0.11mA current source
connected internally and a capacitor and opto-coupler typically connected externally. There is a
delay while charging external capacitor C
source. This delay prevents false triggering under transient conditions, but allows the protection
mechanism to operate under true overload conditions.
Line Sense Pin. This pin is used to protect the set when the input voltage is lower than the
rated input voltage range. If this pin is not used, connect to the ground.
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the V
and ground. Once V
voltage regulator (HV REG) turns on and off irregularly to maintain V
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the
transformer decreases leakage inductance.
CC
Figure 3.
reaches 8V, all internal blocks are activated. After that, the internal high-
STR
CC
Pin Configuration
) via an internal switch during startup (see Internal Block
reaches the UVLO upper threshold (8V) that the internal
3
FB
from 2.4V to 5V using an internal 2.7μA current
CC
at 7.8V.
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CC
pin