FSL206MR Fairchild Semiconductor, FSL206MR Datasheet
![no-image](/images/manufacturer_photos/0/2/252/fairchild_semiconductor_sml.jpg)
FSL206MR
Available stocks
Related parts for FSL206MR
FSL206MR Summary of contents
Page 1
... Overload Protection (OLP), Over-Voltage Protection (OVP), Abnormal Over- Current Protection (AOCP) and Line Under-Voltage Protection (LUVP). During startup, the FSL206MR offers good soft-start performance. The internal high-voltage startup switch and the burst- mode operation with very low operating current reduce the power loss in standby mode ...
Page 2
... Application Diagram Drain STR LS PWM V V GND FB CC (a) With Bias Winding Internal Block Diagram © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0 OUT Figure 1. Typical Application Figure 2. Internal Block Diagram 2 V Drain STR LS PWM V V GND FB CC (b) Without Bias Winding www ...
Page 3
... Drain switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance. © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 Figure 3. Pin Configuration ) via an internal switch during startup (see Internal Block STR reaches the UVLO upper threshold (8V) that the internal CC from 2. using an internal 2.7μ ...
Page 4
... A Symbol θ Junction-to-Ambient Thermal Impedance JA Notes: 7. Referenced the JEDEC recommended environment, JESD51-2, bv and test board, JESD51-10, with minimum land pattern. © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 = 25°C, unless otherwise specified. A Parameter Min. -0.3 -0.3 -0.3 -0.3 (5) (6) ...
Page 5
... V Over-Voltage Protection OVP V Line-Sense Protection On to Off LS_OFF V Line-Sense Protection Off to On LS_ON TSD Thermal Shutdown Temperature HYS TSD Hysteresis Temperature TSD © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 Conditions 250µ 650V 520V 0V ...
Page 6
... Startup Charging Current CH I Startup Current START V Minimum V Supply Voltage STR STR Notes: 8. Though guaranteed by design, not 100% tested in production. 9. Pulse test: pulse width=300ms, duty cycle=2%. © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 (Continued) Conditions 40V FB STR V = 15V, 0V<V < 8V, 0V<V <V ...
Page 7
... Figure 6. Start Threshold Voltage vs. Temperature Feedback Source Current (I 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐40℃ ‐25℃ 0℃ 25℃ Figure 8. Feedback Source Current vs. Temperature © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 ) OSC 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0 110 115 Figure 5. ) START 1.4 1.3 1.2 1.1 1 0.9 ...
Page 8
... Figure 12. Operating Supply Current 2 vs. Temperature Suntdown Delay Current (I 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐40℃ ‐25℃ 0℃ 25℃ Figure 14. Shutdown Delay Current vs. Temperature © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 (Continued 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐40℃ 110 Figure 11. 1.4 1.3 1.2 1.1 1 ...
Page 9
... Figure 16. Frequency Fluctuation Waveform © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 Feedback Control FSL206MR employs current-mode control, as shown in Figure 17. An opto-coupler (such as the FOD817A) and pin, as illustrated in shunt regulator (such as the KA431) are typically used CC to implement the feedback network. Comparing the ...
Page 10
... FB Figure 19. Overload Protection (OLP) © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 Figure 20. Abnormal Over-Current Protection (AOCP) When the secondary rectifier diodes or the transformer pin are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time. ...
Page 11
... If the input voltage is low, the converter should be protected. In the FSL206MR, the LUVP circuit senses the input voltage using the LS pin and, if this voltage is lower than 1.5V, the LUVP signal is generated. The comparator has 0 ...
Page 12
... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 9.83 9.00 6.67 6.096 3 ...
Page 13
... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2010 Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 8-Lead, .300" Wide, Surface Mount Package (LSOP) 13 www.fairchildsemi.com ...
Page 14
... Fairchild Semiconductor Corporation FSL206MR • Rev. 1.0.2 14 www.fairchildsemi.com ...