FAN9612 Fairchild Semiconductor, FAN9612 Datasheet - Page 24

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FAN9612

Manufacturer Part Number
FAN9612
Description
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2008 Fairchild Semiconductor Corporation
FAN9611 / FAN9612 • Rev. 1.1.4
L
L
I
I
C
C
t
Step 4: Output Capacitance
The output capacitance must be calculated by two
different methods. The first equation determines the
capacitor value based on the allowable ripple voltage at
the minimum line frequency. It is important to remember
that the scaled version of this ripple is present at the FB
pin. The feedback voltage is continuously monitored by
the non-latching over voltage protection circuit. Its
threshold is about 8% higher the nominal output voltage.
To avoid triggering the OVP protection during normal
operation, V
the nominal output voltage, V
The second expression yields the minimum output
capacitance based on the required hold-up time based
on the power supply specification. Ultimately, the larger
of the two values satisfies both design requirements and
has to be selected for C
Step 5: Boost Inductance per Channel
The minimum switching frequency can occur either at
the lowest or at the highest input line voltage.
Accordingly, two boost inductor values are calculated
and the lower of the two inductances must be selected.
This L value keeps the minimum operating frequency
above f
Step 6: Maximum On-Time per Channel
Step 7: Peak Inductor Current per Channel
Step 8: Maximum DC Output Current
L,PK
OUT,MAX
ON,
LINE,MAX
LINE,
OUT(RIPPLE
OUT(HOLD)
MAX
OFF
SW,MIN
2
2
η
2
V
η
η
)
OUT,RIPPLE
L
LINE,
V
L
under all operating conditions.
P
V
V
V
LINE,
2
MAX,
P
V
OUT
4
LINE,MAX
LINE,
2
2
MAX,
2
OUT
2
OFF
f
LINE,MIN
f
OFF
f
CH
SW,
SW,MIN
OFF
CH
should be limited to less 12% of
t
MIN
V
ON,MAX
OUT
2
OUT,RIPPLE
V
V
P
.
OUT
OUT
V
V
V
OUT
P
2
OUT
OUT
OUT
OUT
OUT
.
t
HOLD
P
P
2
V
2
MAX,
MAX,
OUT,RIPPLE
2
V
V
LINE,MAX
LINE,
CH
CH
V
OUT,MIN
2
OFF
(10)
(11)
(12)
(13)
(7)
(8)
(9)
24
R
R
R
R
R
Step 9: Zero Current Detect Resistors
where 0.5
resonant waveform across the boost inductor during
zero current detection; N is the turns ratio of the boost
inductor and the auxiliary winding utilized for the zero
current detection; and 0.5mA is the maximum current of
the ZCD pin during the zero current detection period.
Step 10: Maximum On-Time Setting
Resistor
where R
Step 11: Output Voltage Setting Resistors
(Feedback)
where 3V is the reference voltage of the error amplifier
at its non-inverting input and P
the designer. If the power loss associated to the
feedback divider is critical to meet stand-by power
consumption regulations, it might be beneficial to start
the calculation by choosing P
of feedback divider, I
0.4mA at the desired output voltage set point. This value
ensures that parasitic circuit board and pin capacitances
do not introduce unwanted filtering effect in the
feedback path.
If the feedback divider is used to provide startup power
for the FAN9611/12 (see AN-6086 for implementation
details), the following equation is used to calculate R
where 3V is the reference voltage of the error amplifier
at its non-inverting input; 12.5V is the controller’s UVLO
turn-on threshold; 0.12mA is the worst-case startup
current required to start operation; and 3
for the forward voltage drop of three diodes in series of
the startup current. Once the value of R
determined, R
R
or three resistors; depending on safety regulations,
maximum voltage, and or power rating of the selected
resistor type.
FB2
FB2
ZCD1
MOT
FB1
FB1
can be implemented as a series combination of two
3V
 
3V
4340
R
MOT
V
3V
OUT
ZCD2
P
·
FB
V
V
should be between 40k and 130k.
2
OUT
OUT
10
FB1
V
1
LINE,
6
0.12mA
  
is given by the following formula:
0.5
N
is the maximum amplitude of the
R
t
ON,
I
0.5mA
3V
ON
FB
FB2
FB
V
OUT
MAX
should be set to approximately
12.5V
V
OUT
FB
FB
. Otherwise, the current
3
or I
0.7V
FB
are selected by
·
0.7V accounts
www.fairchildsemi.com
FB2
FB2
(14)
(15)
(16)
(17)
(18)
is
:

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