71M6533G Maxim, 71M6533G Datasheet - Page 44
71M6533G
Manufacturer Part Number
71M6533G
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6533.pdf
(132 pages)
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DIO24 and higher do not have SFR registers for direction control. DIO36 and higher do not have SFR
registers for data access. The direction control of these pins is achieved with the LCD_SEGn[3] registers
and data access is controlled with the LCD_SEGn[0] registers in I/O RAM. DIO56 through DIO58 are
dedicated DIO pins. They are controlled with DIO_DIR56[7] through DIO_DIR58[7] (direction) and with
DIO_56[4] through DIO_58[4] (data) in I/O RAM.
44
Data Register
Direction Register
0 = input, 1 = output
Configuration (DIO
or LCD segment)
71M6533 Pin #
71M6534 Pin #
LCD Segment
See the tables in the I/O RAM Description
DIO43 is controlled by LCD_SEG63[0] which resolves to I/O RAM location 0x2045[4].
DIO
Data Register
Configuration (DIO
or LCD segment)
Direction Register
0 = input, 1 = output
Table 41: Data/Direction Registers and Internal Resources for DIO 36-47
71M6533 Pin #
71M6534 Pin #
LCD Segment
Table 42: Data/Direction and Internal Resources for DIO 48-58
DIO
LCD_BITMAP[55:48]
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
LCD_BITMAP[71:64] LCD_BITMAP[80:72]
48
68
23
28
4
–
–
–
–
–
–
–
49
69
24
29
5
36* 37* 38* 39*
56* 57* 58* 59*
87
0*
–
50
70
25
30
6
(Section 5.2)
88
1*
–
51 52* 53* 54* 55* 56
71 72* 73* 74* 75*
50
56
7
LCD_BITMAP[63:56]
89
2*
–
57
0*
–
90
3*
–
for exact bit locations. For example,
58
1*
–
–
–
–
–
–
–
59
2*
–
117 118 46
41 42* 43
61 62* 63
99
5
60
3*
–
6*
–
14
19
Always DIO
–
40
7
57
15
20
–
LCD_BITMAP[71:64]
44
64
31
37
0
58
16
21
–
45 46* 47
65 66* 67
38
44
1
2*
–
5
Rev 2
22
27
3
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