71M6533G Maxim, 71M6533G Datasheet - Page 22
71M6533G
Manufacturer Part Number
71M6533G
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6533.pdf
(132 pages)
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Part Number:
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1.4.3 Generic 80515 Special Function Registers
Table 10
descriptions of the registers can be found at the page numbers listed in the table.
22
P0
SP
DPL
DPH
DPL1
DPH1
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON
P1
DPS
S0CON
S0BUF
IEN2
S1CON
S1BUF
S1RELL
P2
Hex/
Bin
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
Name
Addressable
shows the location, description and reset or power-up value of the generic 80515 SFRs. Additional
WDCON
T2CON
IRCON
S0CON
TCON
X000
IEN1
IEN0
PSW
0x80
0x81
0x82
0x83
0x84
0x85
0x87
0x88
0x89
0x8A
0x8B
0x8C
0x8D
0x8E
0x90
0x92
0x98
0x99
0x9A
0x9B
0x9C
0x9D
0xA0
Bit
P3
P2
P1
P0
Address
(Hex)
Table 10: Generic 80515 SFRs - Location and Reset Values
S0BUF
TMOD
X001
DIR2
DIR1
IP1
IP0
SP
0xFF
0x07
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
Reset value
(Hex)
FLSHCTL
S0RELH
S0RELL
X010
DIR0
IEN2
DPS
DPL
TL0
Description
Port 1
Port 2
Port 0
Stack Pointer
Data Pointer Low 0
Data Pointer High 0
Data Pointer Low 1
Data Pointer High 1
UART Speed Control, Idle and Stop mode Control
Timer/Counter Control
Timer Mode Control
Timer 0, low byte
Timer 1, high byte
Timer 0, low byte
Timer 1, high byte
Clock Control (Stretch=1)
Data Pointer select Register
Serial Port 0, Control Register
Serial Port 0, Data Buffer
Interrupt Enable Register 2
Serial Port 1, Control Register
Serial Port 1, Data Buffer
Serial Port 1, Reload Register, low byte
S1RELH
S1CON
X011
DPH
TL1
Byte Addressable
ERASE
S1BUF
DPL1
X100
TH0
S1RELL
DPH1
X101
TH1
FL_BANK
EEDATA
CKCON
X110
EECTRL
PGADR
PDATA
PCON
X111
Page
Bin/
Rev 2
Hex
24
24
24
24
24
24
28
32
29
29
29
29
29
24
24
20
28
26
31
28
26
26
24
DF
CF
BF
AF
D7
C7
B7
A7
9F
97
8F
87
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