STM32W108CC STMicroelectronics, STM32W108CC Datasheet - Page 88
STM32W108CC
Manufacturer Part Number
STM32W108CC
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CC
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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Full I
necessary segment transitions are shown in
receive frame segment is determined with the SC_TWIACK bit in the SCx_TWICTRL2
register.
Figure 11. I
Generation of a 7-bit address is accomplished with one transmit segment. The upper 7 bits
of the transmitted character contain the 7-bit address. The remaining lower bit contains the
command type ("read" or "write").
Generation of a 10-bit address is accomplished with two transmit segments. The upper 5
bits of the first transmit character must be set to 0x1E. The next 2 bits are for the 2 most
significant bits of the 10-bit address. The remaining lower bit contains the command type
("read" or "write"). The second transmit segment is for the remaining 8 bits of the 10-bit
address.
Transmitted and received characters are accessed through the SCx_DATA register.
To initiate (re)start and stop segments, set the SC_TWISTART or SC_TWISTOP bit in the
SCx_TWICTRL1 register, then wait until the bit is clear. Alternatively, the SC_TWICMDFIN
bit in the SCx_TWISTAT can be used for waiting.
To initiate a transmit segment, write the data to the SCx_DATA data register, then set the
SC_TWISEND bit in the SCx_TWICTRL1 register, and finally wait until the bit is clear.
Alternatively the SC_TWITXFIN bit in the SCx_TWISTAT register can be used for waiting.
To initiate a receive segment, set the SC_TWIRECV bit in the SCx_TWICTRL1 register, wait
until it is clear, and then read from the SCx_DATA register. Alternatively, the SC_TWIRXFIN
bit in the SCx_TWISTAT register can be used for waiting. Now the SC_TWIRXNAK bit in the
SCx_TWISTAT register indicates if a NACK or ACK was received from an I
2
C frames have to be constructed by software from individual I
2
C segment transitions
RECEIVE Segment
STOP Segment
with NACK
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Doc ID 16252 Rev 13
START Segment
IDLE
Figure
11. ACK or NACK generation of an I
NO
TRANSMIT Segment
RECEIVE Segment
received ACK ?
with ACK
YES
2
C segments. All
2
C slave device.
2
C
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