STM32W108CC STMicroelectronics, STM32W108CC Datasheet - Page 165

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STM32W108CC

Manufacturer Part Number
STM32W108CC
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CC

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
10.3.9
Table 96.
10.3.10
Table 97.
31
15
31
15
30
14
30
14
Bits [15:0]
Bits [3:0]
Timer x prescaler register (TIMx_PSC)
Address offset: 0xE028 (TIM1) and 0xF028 (TIM2)
Reset value:
Timer x prescaler register (TIMx_PSC)
Timer x auto-reload register (TIMx_ARR)
Address offset: 0xE02C (TIM1) and 0xF02C (TIM2)
Reset value:
Timer x auto-reload register (TIMx_ARR)
29
13
29
13
TIM_PSC: Prescaler value
The prescaler divides the internal timer clock frequency. The counter clock frequency CK_CNT
is equal to fCK_PSC / (2 ^ TIM_PSC). Clock division factors can range from 1 through 32768.
The division factor is loaded into the shadow prescaler register at each update event (including
when the counter is cleared through TIM_UG bit of TMR1_EGR register or through the trigger
controller when configured in reset mode).
TIM_ARR: Auto-reload value
TIM_ARR is the value to be loaded in the shadow auto-reload register.
The auto-reload register is buffered. Writing or reading the auto-reload register accesses the
buffer register. The content of the buffer register is transfered in the shadow register
permanently or at each update event UEV, depending on the auto-reload buffer enable bit
(TIM_ARBE) in TMRx_CR1 register. The update event is sent when the counter reaches the
overflow point (or underflow point when down-counting) and if the TIM_UDIS bit equals 0 in the
TMRx_CR1 register. It can also be generated by software. The counter is blocked while the
auto-reload value is 0.
28
12
28
12
27
11
27
11
0x0000 0000
0x0000 0000
26
10
26
10
Reserved
25
25
9
9
Doc ID 16252 Rev 13
24
24
8
8
Reserved
Reserved
TIM_ARR
rw
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
General-purpose timers
19
19
3
3
18
18
2
2
TIM_PSC
rw
17
17
1
1
165/232
16
16
0
0

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