STM32W108CC STMicroelectronics, STM32W108CC Datasheet - Page 123
STM32W108CC
Manufacturer Part Number
STM32W108CC
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CC
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
In addition, if the TIM_URS bit in the TIMx_CR1 register is set, setting the TIM_UG bit
generates an update event, but without setting the INT_TIMUIF flag. Thus no interrupt
request is sent. This avoids generating both update and capture interrupt when clearing the
counter on the capture event.
When an update event occurs, the update flag (the INT_TIMUIF bit in the INT_TIMxFLAG
register) is set (unless TIM_USR is 1) and the following registers are updated:
●
●
The following figures show some examples of the counter behavior for different clock
frequencies.
Figure 23. Counter timing diagram, internal clock divided by 1, TIMx_ARR = 0x6
The prescaler shadow register is reloaded with the buffer value (contents of the
TIMx_PSC register).
The auto-reload active register is updated with the buffer value (contents of the
TIMx_ARR register). If the update source is a counter overflow, the auto-reload is
updated before the counter is reloaded, so that the next period is the expected one.
The counter is loaded with the new value.
Doc ID 16252 Rev 13
General-purpose timers
123/232
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