AD9739 Analog Devices, AD9739 Datasheet - Page 25

• Manufacturer Part Number: AD9739
• Description: 14-Bit, 2500 MSPS, RF Digital-to-Analog Converter
• Manufacturer: Analog Devices

Specifications of AD9739

• Resolution (bits): 14bit
• Dac Update Rate: 2.5GSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): +3.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: LVDS,Par

Data Sheet
SYNC AND DATA RECEIVER CONTROLLER LOCK/TRACKING STATUS
Table 22. Sync and Data Receiver Controller Lock/Tracking Status Register
Address
(Hex)
0x21
CLK INPUT COMMON MODE
Table 23. CLK Input Common Mode Register
Address
(Hex)
0x22
0x23
MU CONTROLLER CONFIGURATION AND STATUS
Table 24. Mu Controller Configuration and Status Register
Address
(Hex)
0x24
0x25
0x26
0x27
Name
DIR_P
CLKP_OFFSET[3:0]
DIR_N
CLKN_OFFSET[3:0]
Name
CMP_BST
PHS_DET
AUTO_EN
MU_DUTY
AUTO_EN
Slope
Mode[1:0]
Read
Gain[1:0]
Enable
MUDEL[0]
SRCH_MODE[1:0]
SET_PHS[4:0]
Name
SYNC_TRK_ON
SYNC_LST
SYNC_LCK
RCVR_TRK_ON
RCVR_LST
RCVR_LCK
Bit
5
4
7
6
[5:4]
3
[2:1]
0
7
[6:5]
[4:0]
Bit
4
[3:0]
4
[3:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
7
5
4
3
1
0
Default
Setting
0
0
0
1
00
0
01
0
0
0
0
Default
Setting
0
0000
0
0000
R/W
R
R
R
R
R
R
Comments
Phase detector enable and boost bias bits. Note that both bits should always be set to 1
to enable these functions.
Mu controller duty cycle enable. Note that this bit should always be set to 1 to enable.
Mu controller phase slope lock. 0 = negative slope, 1 = positive slope.
Refer to Table 28 for optimum setting.
Sets the mu controller mode of operation.
00 = search and track (recommended).
01 = search only.
10 = track.
Set to 1 to read the current value of the Mu delay line in.
Sets the mu controller tracking gain. Recommended to leave at the default 01 setting.
1 = enable the mu controller.
0 = disable the mu controller.
The LSB of the 9-bit MUDEL setting.
Sets the direction in which the mu controller searches (from its initial MUDEL setting) for
the optimum mu delay line setting that corresponds to the desired phase/slope setting
(that is, SET_PHS and slope ).
00 = down.
01 = up.
10 = down/up (recommended).
Sets the target phase that the mu controller locks to with a maximum setting of 16.
Refer to Table 28 for optimum setting.
Comments
DIR_P and DIR_N:
0 = VCM at the DACCLK_P input decreases with the offset value.
1 = VCM at the DACCLK_P input increases with the offset value.
CLKx_OFFSET sets the magnitude of the offset for the DACCLK_P and DACCLK_N
inputs. For optimum performance, set to 1111.
Rev. B | Page 25 of 48
Default
Setting
0
0
0
0
0
0
Comments
SYNC_TRK_ON and RCVR_TRK_ON:
0 = tracking not established.
1 = tracking established.
SYNC_LCK and RCVR_LCK:
0 = controller is not locked.
1 = controller is locked.
SYNC_LST and RCVR_LST:
0 = lock has not been lost.
1 = lock has been lost at some point.
AD9739