AD9739A Analog Devices, AD9739A Datasheet - Page 2

• Manufacturer Part Number: AD9739A
• Description: 14-Bit, 2.5 GSPS, RF D/A Converter
• Manufacturer: Analog Devices

Specifications of AD9739A

• Resolution (bits): 14bit
• Dac Update Rate: 2.5GSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): n/a
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: LVDS,Par

AD9737A/AD9739A
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings ............................................................ 8
Pin Configurations and Function Descriptions ........................... 9
Typical Performance Characteristics—AD9737A ..................... 14
Typical Performance Characteristics—AD9739A ..................... 26
Terminology .................................................................................... 39
Serial Port Interface (SPI) Register ............................................... 40
DC Specifications ......................................................................... 4
LVDS Digital Specifications ........................................................ 5
Serial Port Specifications ............................................................. 6
AC Specifications .......................................................................... 7
Thermal Resistance ...................................................................... 8
ESD Caution .................................................................................. 8
Static Linearity ............................................................................ 14
AC (Normal Mode) .................................................................... 15
AC (Mix-Mode) .......................................................................... 17
One-Carrier DOCSIS Performance (Normal Mode) ............ 20
Four-Carrier DOCSIS Performance (Normal Mode) ........... 21
Eight-Carrier DOCSIS Performance (Normal Mode) .......... 22
16-Carrier DOCSIS Performance (Normal Mode) ............... 23
32-Carrier DOCSIS Performance (Normal Mode) ............... 24
64- and 128-Carrier DOCSIS Performance (Normal Mode)25
Static Linearity ............................................................................ 26
AC (Normal Mode) .................................................................... 28
AC (Mix-Mode) .......................................................................... 31
One-Carrier DOCSIS Performance (Normal Mode) ............ 33
Four-Carrier DOCSIS Performance (Normal Mode) ........... 34
Eight-Carrier DOCSIS Performance (Normal Mode) .......... 35
16-Carrier DOCSIS Performance (Normal Mode) ............... 36
32-Carrier DOCSIS Performance (Normal Mode) ............... 37
64- and 128-Carrier DOCSIS Performance (Normal Mode)38
Rev. | Page 2 of 64
C
SPI Register Map ............................................................................ 42
Theory of Operation ...................................................................... 48
Analog Interface Considerations .................................................. 55
Outline Dimensions ....................................................................... 63
SPI Register Map Description .................................................. 40
SPI Operation ............................................................................. 40
SPI Port Configuration and Software Reset ........................... 43
Power-Down LVDS Interface and TxDAC® ........................... 43
Controller Clock Disable ........................................................... 43
Interrupt Request (IRQ) Enable/Status ................................... 44
TxDAC Full-Scale Current Setting (I
TxDAC Quad-Switch Mode of Operation .............................. 44
DCI Phase Alignment Status .................................................... 44
Data Receiver Controller Configuration ................................. 44
Data Receiver Controller_Data Sample Delay Value ............ 45
Data Receiver Controller_DCI Delay Value/Window and
Phase Rotation ............................................................................ 45
Data Receiver Controller_Delay Line Status .......................... 45
Data Receiver Controller Lock/Tracking Status ..................... 45
CLK Input Common Mode ...................................................... 46
Mu Controller Configuration and Status ................................ 46
Part ID ......................................................................................... 47
LVDS Data Port Interface .......................................................... 49
Mu Controller ............................................................................. 52
Interrupt Requests ...................................................................... 54
Analog Modes of Operation ..................................................... 55
Clock Input Considerations ...................................................... 56
Voltage Reference ....................................................................... 57
Analog Outputs .......................................................................... 57
Output Stage Configuration ..................................................... 59
Nonideal Spectral Artifacts ....................................................... 60
Lab Evaluation of the AD9737A/AD9739A ........................... 61
Recommended Start-Up Sequence .......................................... 61
Ordering Guide .......................................................................... 63
OUTFS
) and Sleep ........... 44
Data Sheet