AD6672 Analog Devices, AD6672 Datasheet - Page 3

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AD6672

Manufacturer Part Number
AD6672
Description
IF Receiver
Manufacturer
Analog Devices
Datasheet

Specifications of AD6672

Resolution (bits)
11bit
# Chan
1
Sample Rate
250MSPS
Interface
LVDS
Analog Input Type
Diff-Uni
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD6672BCPZ-250
Manufacturer:
SMSC
Quantity:
869
When the NSR block is disabled, the ADC data is provided directly
to the output at a resolution of 11 bits. This allows the
to be used in telecommunication applications, such as a digital
predistortion observation path, where wider bandwidths are
required.
After digital signal processing, multiplexed output data is
routed into one 11-bit output port such that the maximum
data rate is 500 Mbps (DDR). This output is LVDS and
supports ANSI-644 levels.
The
This IF sampling architecture greatly reduces component cost
and complexity compared with traditional analog techniques or
less integrated digital methods.
Flexible power-down options allow significant power savings.
Programming for device setup and control is accomplished
using a 3-wire, SPI-compatible serial interface with numerous
modes to support board level system testing.
The
and is specified over the industrial temperature range of −40°C
to +85°C. This product is protected by a U.S. patent.
AD6672
AD6672
receiver digitizes a wide spectrum of IF frequencies.
is available in a 32-lead, RoHS-compliant LFCSP
AD6672
Rev. 0 | Page 3 of 32
PRODUCT HIGHLIGHTS
1.
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Integrated 11-bit, 250 MSPS ADC with a noise shaping
requantizer option.
Operation from a single 1.8 V supply and a separate digital
output driver supply accommodating LVDS outputs.
On-chip 1-to-8 integer clock divider function to support a
wide range of clocking.
Noise shaping requantizer function allows attaining improved
SNR within a reduced frequency band. With NSR enabled,
the
Standard serial port interface (SPI) that supports various
product features and functions, such as data formatting
(offset binary, twos complement, or gray coding), enabling
the clock DCS, power-down, test modes, and voltage
reference mode.
AD6672
supports up to 82 MHz at 250 MSPS.
AD6672

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