SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 381

• Manufacturer Part Number: SAM3S8B
• Manufacturer: Atmel Corporation

23.7.1.2
23.8
23.8.1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Hardware Configuration
Software Configuration
Standard Read and Write Protocols
Read Waveforms
NOR Flash
A[0..21]
NRST
NWE
NCS0
NRD
D[0..7]
Configure the Static Memory Controller CS0 Setup, Pulse, Cycle and Mode depending on Flash
timings and system bus frequency.
In the following sections, NCS represents one of the NCS[0..3] chip select lines.
The read cycle is shown on
The read cycle starts with the address setting on the memory address bus.
3V3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A0
Figure
U1
U1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
RESET
WE
WP
VPP
CE
OE
23-5.
VCCQ
VCC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VSS
VSS
C1
C1
100NF
100NF
D0
D1
D2
D3
D4
D5
D6
D7
3V3
100NF
100NF
C2
C2
SAM3S8/SD8
SAM3S8/SD8
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