SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 376

• Manufacturer Part Number: SAM3S8B
• Manufacturer: Atmel Corporation

23.3
Table 23-1.
23.4
23.4.1
23.4.2
23.5
376
376
Name
NCS[3:0]
NRD
NWE
A[23:0]
D[7:0]
NWAIT
NANDCS
NANDOE
NANDWE
I/O Lines Description
Product Dependencies
External Memory Mapping
SAM3S8/SD8
SAM3S8/SD8
I/O Lines
Power Management
I/O Line Description
Description
Static Memory Controller Chip Select Lines
Read Signal
Write Enable Signal
Address Bus
Data Bus
External Wait Signal
NAND Flash Chip Select Line
NAND Flash Output Enable
NAND Flash Write Enable
The pins used for interfacing the Static Memory Controller are multiplexed with the PIO lines.
The programmer must first program the PIO controller to assign the Static Memory Controller
pins to their peripheral function. If I/O Lines of the SMC are not used by the application, they can
be used for other purposes by the PIO Controller.
The SMC is clocked through the Power Management Controller (PMC), thus the programmer
must first configure the PMC to enable the SMC clock.
The SMC provides up to 24 address lines, A[23:0]. This allows each chip select line to address
up to 16 Mbytes of memory.
If the physical memory device connected on one chip select is smaller than 16 Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
Figure
23-1).
Output
Output
Output
Output
Output
Output
Output
Type
Input
I/O
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Active Level
Low
Low
Low
Low
Low
Low
Low