ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 242
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ATmega88PA Automotive
Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
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22.9.4
242
Atmel ATmega48PA/88PA/168PA [Preliminary]
TWDR – TWI Data Register
Table 22-8.
To calculate bit rates, see
used in the equation.
In Transmit mode, TWDR contains the next byte to be transmitted. In Receive mode, the
TWDR contains the last byte received. It is writable while the TWI is not in the process of shift-
ing a byte. This occurs when the TWI Interrupt Flag (TWINT) is set by hardware. Note that the
Data Register cannot be initialized by the user before the first interrupt occurs. The data in
TWDR remains stable as long as TWINT is set. While data is shifted out, data on the bus is
simultaneously shifted in. TWDR always contains the last byte present on the bus, except after
a wake up from a sleep mode by the TWI interrupt. In this case, the contents of TWDR is
undefined.
In the case of a lost bus arbitration, no data is lost in the transition from Master to Slave. Han-
dling of the ACK bit is controlled automatically by the TWI logic, the CPU cannot access the
ACK bit directly.
• Bits 7:0 – TWD: TWI Data Register
These eight bits constitute the next data byte to be transmitted, or the latest data byte received
on the 2-wire Serial Bus.
TWPS1
0
0
1
1
Bit
(0xBB)
Read/Write
Initial Value
TWI Bit Rate Prescaler
TWD7
R/W
7
1
TWD6
R/W
TWPS0
0
1
0
1
6
1
“Bit Rate Generator Unit” on page
TWD5
R/W
5
1
TWD4
R/W
4
1
Prescaler Value
1
4
16
64
TWD3
R/W
3
1
TWD2
R/W
2
1
220. The value of TWPS1...0 is
TWD1
R/W
1
1
TWD0
R/W
0
1
9223B–AVR–09/11
TWDR
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