ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 174

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ATmega88PA Automotive

Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
19.5.2
174
Atmel ATmega48PA/88PA/168PA [Preliminary]
SPSR – SPI Status Register
• Bits 1, 0 – SPR1, SPR0: SPI Clock Rate Select 1 and 0
These two bits control the SCK rate of the device configured as a Master. SPR1 and SPR0
have no effect on the Slave. The relationship between SCK and the Oscillator Clock frequency
f
Table 19-5.
• Bit 7 – SPIF: SPI Interrupt Flag
When a serial transfer is complete, the SPIF Flag is set. An interrupt is generated if SPIE in
SPCR is set and global interrupts are enabled. If SS is an input and is driven low when the SPI
is in Master mode, this will also set the SPIF Flag. SPIF is cleared by hardware when execut-
ing the corresponding interrupt handling vector. Alternatively, the SPIF bit is cleared by first
reading the SPI Status Register with SPIF set, then accessing the SPI Data Register (SPDR).
• Bit 6 – WCOL: Write COLlision Flag
The WCOL bit is set if the SPI Data Register (SPDR) is written during a data transfer. The
WCOL bit (and the SPIF bit) are cleared by first reading the SPI Status Register with WCOL
set, and then accessing the SPI Data Register.
• Bit 5...1 – Reserved
These bits are reserved bits in the Atmel
zero.
• Bit 0 – SPI2X: Double SPI Speed Bit
When this bit is written logic one the SPI speed (SCK Frequency) will be doubled when the
SPI is in Master mode (see
CPU clock periods. When the SPI is configured as Slave, the SPI is only guaranteed to work at
f
The SPI interface on the Atmel ATmega48PA/88PA/168PA is also used for program memory
and EEPROM downloading or uploading. See
verification.
osc
osc
Bit
0x2D (0x4D)
Read/Write
Initial Value
/4 or lower.
is shown in the following table:
SPI2X
0
0
0
0
1
1
1
1
Relationship Between SCK and the Oscillator Frequency
SPIF
R
7
0
WCOL
SPR1
R
6
0
0
0
1
1
0
0
1
1
Table
19-5). This means that the minimum SCK period will be two
R
5
0
®
ATmega48PA/88PA/168PA and will always read as
R
4
0
SPR0
0
1
0
1
0
1
0
1
page 309
R
3
0
SCK Frequency
f
f
f
f
f
f
f
f
osc
osc
osc
osc
osc
osc
osc
osc
/
/
/
/
/
/
/
/
4
16
64
128
2
8
32
64
R
2
0
for serial programming and
R
1
0
SPI2X
R/W
0
0
9223B–AVR–09/11
SPSR

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