ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 230

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ATmega325PA

Manufacturer Part Number
ATmega325PA
Description
Manufacturer
Atmel Corporation
Datasheets

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23.9.3
23.9.3.1
23.9.3.2
8285D–AVR–06/11
ADCL and ADCH – ADC Data Register
ADLAR = 0
ADLAR = 1
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Table 23-5.
When an ADC conversion is complete, the result is found in these two registers.When ADCL is
read, the ADC Data Register is not updated until ADCH is read. Consequently, if the result is left
adjusted and no more than 8-bit precision is required, it is sufficient to read ADCH. Otherwise,
ADCL must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result
is right adjusted.
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in
page
Bit
(0x79)
(0x78)
Read/Write
Initial Value
Bit
Read/Write
Initial Value
225.
ADPS2
0
0
0
0
1
1
1
1
ADC Prescaler Selections
ADC7
ADC9
ADC1
15
15
7
R
R
0
0
7
R
R
0
0
ADC6
ADC8
ADC0
14
14
ADPS1
R
R
R
R
6
0
0
6
0
0
0
0
1
1
0
0
1
1
ADC5
ADC7
13
13
R
R
R
R
5
0
0
5
0
0
ADC4
ADC6
12
12
R
R
R
R
4
0
0
4
0
0
ADPS0
0
1
0
1
0
1
0
1
ADC3
ADC5
11
11
R
R
R
R
3
0
0
3
0
0
ADC2
ADC4
10
10
R
R
R
R
2
0
0
2
0
0
”ADC Conversion Result” on
ADC9
ADC1
ADC3
Division Factor
R
R
R
R
9
1
0
0
9
1
0
0
128
16
32
64
2
2
4
8
ADC8
ADC0
ADC2
R
R
R
R
8
0
0
0
8
0
0
0
ADCH
ADCL
ADCH
ADCL
230

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