ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 138
ATmega325PA
Manufacturer Part Number
ATmega325PA
Description
Manufacturer
Atmel Corporation
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8285D–AVR–06/11
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Each half period of the external clock applied must be longer than one system clock cycle to
ensure correct sampling. The external clock must be guaranteed to have less than half the sys-
tem clock frequency (f
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than f
An external clock source can not be prescaled.
Figure 17-2. Prescaler for Timer/Counter0 and Timer/Counter1
Note:
PSR10
clk
T0
T1
I/O
1. The synchronization logic on the input pins (
Synchronization
Synchronization
ExtClk
< f
clk_I/O
/2) given a 50/50% duty cycle. Since the edge detector uses
clk
Clear
T1
T1/T0)
is shown in
(1)
Figure
17-1.
clk
T0
clk_I/O
/2.5.
138
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