ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 165

• Manufacturer Part Number: ATmega325PA
• Manufacturer: Atmel Corporation

19.4
8285D–AVR–06/11
Data Modes
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
There are four combinations of SCK phase and polarity with respect to serial data, which are
determined by control bits CPHA and CPOL. The SPI data transfer formats are shown in
19-3
nal, ensuring sufficient time for data signals to stabilize. This is clearly seen by summarizing
Table 19-3
Table 19-2.
Figure 19-3. SPI Transfer Format with CPHA = 0
Figure 19-4. SPI Transfer Format with CPHA = 1
and
CPOL=0, CPHA=0
CPOL=0, CPHA=1
CPOL=1, CPHA=0
CPOL=1, CPHA=1
Figure
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SS
and
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB first (DORD = 0)
LSB first (DORD = 1)
CPOL Functionality
Table
19-4. Data bits are shifted out and latched in on opposite edges of the SCK sig-
19-4, as done below:
MSB
LSB
MSB
LSB
Sample (Falling)
Sample (Rising)
Leading Edge
Setup (Falling)
Setup (Rising)
Bit 6
Bit 1
Bit 6
Bit 1
Bit 5
Bit 2
Bit 5
Bit 2
Bit 4
Bit 3
Bit 4
Bit 3
Bit 3
Bit 4
Sample (Falling)
Sample (Rising)
Setup (Falling)
Setup (Rising)
Trailing eDge
Bit 3
Bit 4
Bit 2
Bit 5
Bit 2
Bit 5
Bit 1
Bit 6
Bit 1
Bit 6
LSB
MSB
LSB
MSB
SPI Mode
0
1
2
3
Figure
165