ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 214
ATmega325PA
Manufacturer Part Number
ATmega325PA
Description
Manufacturer
Atmel Corporation
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23. ADC - Analog to Digital Converter
23.1
23.2
8285D–AVR–06/11
Features
Overview
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
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The ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P features a 10-
bit successive approximation ADC. The ADC is connected to an 8-channel Analog Multiplexer
which allows eight single-ended voltage inputs constructed from the pins of Port F. The single-
ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
The ADC has a separate analog supply voltage pin, AVCC. AV
± 0.3V from V
pin.
Internal reference voltages of nominally 1.1V or AVCC are provided On-chip. The voltage refer-
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.
The Power Reduction ADC bit, PRADC, in
be written to zero to enable the ADC module.
10-bit Resolution
0.5 LSB Integral Non-linearity
± 2 LSB Absolute Accuracy
13µs - 260µs Conversion Time (50kHz to 1MHz ADC clock)
Up to 15ksps at Maximum Resolution (200kHz ADC clock)
Eight Multiplexed Single Ended Input Channels
Optional Left Adjustment for ADC Result Readout
0 - V
Selectable 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
ADC Input Voltage Range
CC
. See the paragraph
”ADC Noise Canceler” on page 220
”PRR – Power Reduction Register” on page 45
CC
must not differ more than
on how to connect this
Figure
23-1.
must
214
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