ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 347

• Manufacturer Part Number: ATxmega64B3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64B3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.16.5.1
25.16.5.2
25.16.5.3
25.16.6
25.16.6.1
25.16.6.2
25.16.7
8291A–AVR–10/11
RESL – Result register Low
SCAN – Input Channel Scan register
12-bit Mode, Left Adjusted
12-bit Mode, Right Adjusted
8-bit Mode
12-/8-bit Mode
12-bit Mode, Left Adjusted
• Bit 7:0 – RES[11:4]: Channel Result High
These are the eight msbs of the 12-bit ADC result.
• Bit 7:4 – Reserved
These bits will in practice be the extension of the sign bit, CHRES11, when the ADC works in dif-
ferential mode, and set to zero when the ADC works in signed mode.
• Bits 3:0 – RES[11:8]: Channel Result High
These are the four msbs of the 12-bit ADC result.
• Bit 7:0 – Reserved
These bits will in practice be the extension of the sign bit, CHRES7, when the ADC works in
signed mode, and set to zero when the ADC works in single-ended mode.
• Bit 7:0 – RES[7:0]: Result Low
These are the eight lsbs of the ADC result.
• Bit 7:4 – RES[3:0]: Result Low
These are the four lsbs of the 12-bit ADC result.
• Bit 3:0 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Scan is enabled when COUNT is set differently than 0.
12-/8-bit, right
12-bit, left.
Bit
+0x06
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
R/W
7
0
R/W
6
0
R
7
0
OFFSET[3:0]
R/W
5
0
R
6
0
RES[3:0]
R/W
4
0
R
5
0
R/W
3
0
R
4
0
Atmel AVR XMEGA B
RES[7:0]
R/W
2
0
R
3
–
0
COUNT[3:0]
R/W
R
1
0
2
–
0
R/W
R
0
0
1
–
0
SCAN
R
0
–
0
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