ATtiny2313A Atmel Corporation, ATtiny2313A Datasheet - Page 82

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ATtiny2313A

Manufacturer Part Number
ATtiny2313A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny2313A

Flash (kbytes)
2 Kbytes
Pin Count
20
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
18
Ext Interrupts
18
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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11.9
11.9.1
82
Register Description
ATtiny2313A/4313
TCCR0A – Timer/Counter Control Register A
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 11-2.
Table 11-3
mode.
Table 11-3.
Note:
Bit
0x30 (0x50)
Read/Write
Initial Value
COM0A1
COM0A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
COM0A1
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
COM0A0
COM0A0
7
0
0
1
0
1
0
1
0
1
Table 11-2
COM0A0
R/W
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match, set OC0A at TOP
Set OC0A on Compare Match, clear OC0A at TOP
COM0B1
R/W
shows the COM0A1:0 bit functionality when the WGM02:0 bits
5
0
COM0B0
R/W
4
0
R
3
0
(1)
2
R
0
WGM01
R/W
1
0
“Fast PWM Mode” on page 77
WGM00
R/W
0
0
TCCR0A
8246B–AVR–09/11

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