ATtiny2313A Atmel Corporation, ATtiny2313A Datasheet - Page 168
ATtiny2313A
Manufacturer Part Number
ATtiny2313A
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny2313A
Flash (kbytes)
2 Kbytes
Pin Count
20
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
18
Ext Interrupts
18
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATtiny2313A-MMH
Manufacturer:
SAMSUNG
Quantity:
101
Company:
Part Number:
ATtiny2313A-MU
Manufacturer:
ATMEL
Quantity:
313
Company:
Part Number:
ATtiny2313A-MUR
Manufacturer:
LT
Quantity:
4 439
Company:
Part Number:
ATtiny2313A-PU
Manufacturer:
TI
Quantity:
1 560
Part Number:
ATtiny2313A-PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATtiny2313A-SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
17. Analog Comparator
17.1
17.1.1
168
Register Description
ATtiny2313A/4313
ACSR – Analog Comparator Control and Status Register
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
Figure 17-1. Analog Comparator Block Diagram
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar-
ator. When the bandgap reference is used as input to the Analog Comparator, it will take a
certain time for the voltage to stabilize. If not stibilized, the first conversion may give a wrong
value.
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.
Bit
0x08 (0x28)
Read/Write
Initial Value
See “Internal Voltage Reference” on page 42.
REFERENCE
BANDGAP
Figure
ACD
R/W
ACBG
7
0
17-1.
ACBG
R/W
6
0
ACO
N/A
R
5
R/W
ACI
4
0
ACIE
R/W
3
0
ACIC
R/W
2
0
ACIS1
R/W
1
0
ACIS0
R/W
0
0
ACSR
8246B–AVR–09/11