ATmega6490P Atmel Corporation, ATmega6490P Datasheet - Page 59

• Manufacturer Part Number: ATmega6490P
• Manufacturer: Atmel Corporation

Specifications of ATmega6490P

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.2.1
8284D–AVR–6/11
Moving Interrupts Between Application and Boot Space
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
he General Interrupt Control Register controls the placement of the Interrupt Vector table, see
”MCUCR – MCU Control Register” on page
To avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol-
lowed to change the IVSEL bit:
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note:
The following example shows how interrupts are moved.
Assembly Code Example
C Code Example
0x382C/0x782C
;
0x382E/0x782ERESET:ldir16,high(RAMEND); Main program start
0x382F/0x782F
0x3830/0x7830
0x3831/0x7831
0x3832/0x7832
0x3833/0x7833
a. Write the Interrupt Vector Change Enable (IVCE) bit to one.
b. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Move_interrupts:
;Get MCUCR
in r16, MCUCR
mov r17, r16
void Move_interrupts(void)
{
}
; Enable change of Interrupt Vectors
ori r16, (1<<IVCE)
out MCUCR, r16
; Move interrupts to Boot Flash section
ori r17, (1<<IVSEL)
out MCUCR, r17
ret
/* Enable change of Interrupt Vectors */
MCUCR |= (1<<IVCE);
/* Move interrupts to Boot Flash section */
MCUCR |= (1<<IVSEL);
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to the section
While-Write Self-Programming” on page 294
jmp
out
ldi
out
sei
<instr> xxx
SPM_RDY
SPH,r16
r16,low(RAMEND)
SPL,r16
; Store Program Memory Ready Handler
60.
; Set Stack Pointer to top of RAM
; Enable interrupts
for details on Boot Lock bits.
”Boot Loader Support – Read-
59