ATmega6490P Atmel Corporation, ATmega6490P Datasheet - Page 26

• Manufacturer Part Number: ATmega6490P
• Manufacturer: Atmel Corporation

Specifications of ATmega6490P

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8.4
8.5
8284D–AVR–6/11
I/O Memory
General Purpose I/O Registers
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can
be done by enabling the internal Brown-out Detector (BOD). If the detection level of the internal
BOD does not match the needed detection level, an external low V
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
T h e I / O s p a c e d e f i n i t i o n o f t h e
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is shown in
ister Summary” on page
All ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P I/Os and
peripherals are placed in the I/O space. All I/O locations may be accessed by the LD/LDS/LDD
and ST/STS/STD instructions, transferring data between the 32 general purpose working regis-
ters and the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly bit-
accessible using the SBI and CBI instructions. In these registers, the value of single bits can be
checked by using the SBIS and SBIC instructions. Refer to the instruction set section for more
details. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F
must be used. When addressing I/O Registers as data space using LD and ST instructions,
0x20 must be added to these addresses.
The ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is a complex
microcontroller with more peripheral units than can be supported within the 64 location reserved
in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in
SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P contains
three General Purpose I/O Registers. These registers can be used for storing any information,
and they are particularly useful for storing global variables and Status Flags. General Purpose
I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI,
CBI, SBIS, and SBIC instructions.
679.
CC
reset Protection circuit can
”Reg-
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