ATmega6490P Atmel Corporation, ATmega6490P Datasheet - Page 217

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ATmega6490P

Manufacturer Part Number
ATmega6490P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega6490P

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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22.3
22.3.1
22.3.2
8284D–AVR–6/11
Register Description
ADCSRB – ADC Control and Status Register B
ACSR – Analog Comparator Control and Status Register
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
Table 22-1.
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar-
ator. When the bandgap reference is used as input to the analog comparator, it will take a
certain time for the voltage to stabilize. If not stabilized, the first conversion may give a wrong
value.
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.
Bit
(0x7B)
Read/Write
Initial Value
Bit
0x30 (0x50)
Read/Write
Initial Value
ACME
1
1
1
1
1
1
1
See ”Internal Voltage Reference” on page 51.
Analog Comparator Multiplexed Input (Continued)
ACD
R/W
ADEN
7
0
R
7
0
0
0
0
0
0
0
0
ACBG
ACME
R/W
R/W
”Analog Comparator Multiplexed Input” on page
6
0
6
0
MUX2:0
001
010
011
100
101
110
111
ACO
N/A
R
5
R
5
0
Analog Comparator Negative Input
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
R/W
ACI
4
0
R
4
0
ACIE
R/W
3
0
3
R
0
ADTS2
ACIC
R/W
R/W
2
0
2
0
ADTS1
ACIS1
R/W
R/W
1
0
1
0
216.
ADTS0
ACIS0
R/W
R/W
0
0
0
0
ADCSRB
ACSR
217

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