ATmega32U2 Atmel Corporation, ATmega32U2 Datasheet - Page 130

• Manufacturer Part Number: ATmega32U2
• Manufacturer: Atmel Corporation

Specifications of ATmega32U2

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 20
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

7799D–AVR–11/10
.
Table 16-1.
Table 16-2
PWM mode.
Table 16-2.
Note:
Table 16-3
correct and frequency correct PWM mode.
COMnA1/COMnB1/
COMnA1/COMnB1/
COMnC1
COMnC0
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the set or clear
is done at TOP.
shows the COMnx[1:0] bit functionality when the WGMn[3:0] bits are set to the phase
0
0
1
1
shows the COMnx[1:0] bit functionality when the WGMn[3:0] bits are set to the fast
0
0
1
1
Compare Output Mode, non-PWM
Compare Output Mode, Fast PWM
See “Fast PWM Mode” on page 97.
COMnA0/COMnB0/
COMnA0/COMnB0/
COMnC0
COMnC0
0
1
0
1
0
1
0
1
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
Toggle OCnA/OCnB/OCnC on compare match.
Clear OCnA/OCnB/OCnC on compare match
(set output to low level).
Set OCnA/OCnB/OCnC on compare match (set
output to high level).
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
WGM1[3:0] = 14 or 15: Toggle OC1A on
Compare Match, OC1B and OC1C disconnected
(normal port operation). For all other WGM1
settings, normal port operation,
OC1A/OC1B/OC1C disconnected.
Clear OCnA/OCnB/OCnC on compare match,
set OCnA/OCnB/OCnC at TOP
Set OCnA/OCnB/OCnC on compare match,
clear OCnA/OCnB/OCnC at TOP
ATmega8U2/16U2/32U2
for more details.
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