ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 206
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ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 206 of 367
- Download datasheet (7Mb)
17.3.3
17.3.4
17.3.5
17.4
206
LIN / UART Controller
Atmel ATmega16/32/64/M1/C1
Data Transport
Schedule Table
Compatibility with LIN 1.3
Two types of data may be transported in a frame; signals or diagnostic messages.
The master task (in the master node) transmits frame headers based on a schedule table. The
schedule table specifies the identifiers for each header and the interval between the start of a
frame and the start of the following frame. The master application may use different schedule
tables and select among them.
LIN 2.1 is a super-set of LIN 1.3.
A LIN 2.1 master node can handle clusters consisting of both LIN 1.3 slaves and/or LIN 2.1
slaves. The master will then avoid requesting the new LIN 2.1 features from a LIN 1.3 slave:
LIN 2.1 slave nodes can not operate with a LIN 1.3 master node (e.g. the LIN1.3 master does
not support the enhanced checksum).
The LIN 2.1 physical layer is backwards compatible with the LIN1.3 physical layer. But not the
other way around. The LIN 2.1 physical layer sets greater requirements, i.e. a master node
using the LIN 2.1 physical layer can operate in a LIN 1.3 cluster.
The LIN/UART controller is divided in three main functions:
These functions mainly use two services:
Because these two services are basically UART services, the controller is also able to switch
into an UART function.
• Signals
• Diagnostic messages
• Enhanced checksum,
• Re-configuration and diagnostics,
• Automatic baud rate detection,
• "Response error" status monitoring.
• Tx LIN Header function,
• Rx LIN Header function,
• LIN Response function.
• Rx service,
• Tx service.
Signals are scalar values or byte arrays that are packed into the data field of a frame. A
signal is always present at the same position in the data field for all frames with the same
identifier.
Diagnostic messages are transported in frames with two reserved identifiers. The
interpretation of the data field depends on the data field itself as well as the state of the
communicating nodes.
7647G–AVR–09/11
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