ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 142
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ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 142 of 367
- Download datasheet (7Mb)
14.6
142
Update of Values
Atmel ATmega16/32/64/M1/C1
POCRnRB
POCRnSB
POCRnSA
PSC Counter
Run
PSCOUTnA
PSCOUTnB
Note that in center aligned mode, POCRnRAH/L is not required (as it is in one-ramp mode) to
control PSC Output waveform timing. This allows POCRnRAH/L to be freely used to adjust
ADC synchronization (
Figure 14-7. Controlled Start and Stop Mechanism in Centered Mode
Note:
To avoid unasynchronous and incoherent values in a cycle, if an update of one of several val-
ues is necessary, all values are updated at the same time at the end of the cycle by the PSC.
The new set of values is calculated by sofware and the update is initiated by software.
Figure 14-8. Update at the end of complete PSC cycle.
The software can stop the cycle before the end to update the values and restart a new PSC
cycle.
Software
PSC
See “PSC Control Register – PCTL” on page
Regulation Loop
Calculation
Cycle
With Set i
Cycle
With Set i
See “Analog Synchronization” on page 149.
Cycle
With Set i
Writting in
PSC Registers
0
Cycle
With Set i
End of Cycle
Request for
an Update
154.(PCCYC = 1)
Cycle
With Set j
).
7647G–AVR–09/11
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