ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 119
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ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 119 of 367
- Download datasheet (7Mb)
13.7.1
7647G–AVR–09/11
Compare Output Mode and Waveform Generation
Figure 13-5. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OCnx) from the Waveform
Generator if either of the COMnx1:0 bits are set. However, the OCnx pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OCnx pin (DDR_OCnx) must be set as output before the OCnx value is
visible on the pin. The port override function is generally independent of the Waveform Gener-
ation mode, but there are some exceptions. Refer to
for details.
The design of the Output Compare pin logic allows initialization of the OCnx state before the
output is enabled. Note that some COMnx1:0 bit settings are reserved for certain modes of
operation.
The COMnx1:0 bits have no effect on the Input Capture unit.
The Waveform Generator uses the COMnx1:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COMnx1:0 = 0 tells the Waveform Generator that no action
on the OCnx Register is to be performed on the next compare match. For compare output
actions in the non-PWM modes refer to
Table 13-2 on page
Table 13-3 on page
A change of the COMnx1:0 bits state will have effect at the first compare match after the bits
are written. For non-PWM modes, the action can be forced to have immediate effect by using
the FOCnx strobe bits.
COMnx1
COMnx0
FOCnx
clk
I/O
See “16-bit Timer/Counter Register Description” on page 130.
130, and for phase correct and phase and frequency correct PWM refer to
131.
Waveform
Generator
Atmel ATmega16/32/64/M1/C1
Table 13-1 on page
D
D
D
PORT
DDR
OCnx
Q
Q
Q
Table
13-1,
130. For fast PWM mode refer to
1
0
Table 13-2
and
OCnx
Table 13-3
Pin
119
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