ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 152
ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 152 of 367
- Download datasheet (7Mb)
14.16.2
152
Atmel ATmega16/32/64/M1/C1
PSC Synchro Configuration – PSYNC
Bit
Read/Write
Initial Value
• Bit 7 – not use
not use
• Bit 6 – not use
not use
• Bit 5:4 – PSYNC21:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module 2
to the ADC for synchronization
• Bit 3:2 – PSYNC11:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module 1
to the ADC for synchronization
• Bit 1:0 – PSYNC01:0: Synchronization Out for ADC Selection
Select the polarity and signal source for generating a signal which will be sent from module 0
to the ADC for synchronization.
Table 14-8.
Table 14-9.
PSYNCn1
0
0
1
1
PSYNCn1
0
0
1
1
Synchronization Source Description in One Ramp Mode
Synchronization Source Description in Centered Mode
PSYNCn0
0
1
0
1
PSYNCn0
0
1
0
1
R/W
7
0
-
R/W
6
0
-
Description
Send signal on match with OCRnRA (during counting down of PSC).
The min value of OCRnRA must be 1.
Send signal on match with OCRnRA (during counting up of PSC). The
min value of OCRnRA must be 1.
no synchronization signal
no synchronization signal
Description
Send signal on leading edge of PSCOUTnA(match with OCRnSA)
Send signal on trailing edge of PSCOUTnA(match with OCRnRA or
fault/retrigger on part A)
Send signal on leading edge of PSCOUTnB (match with OCRnSB)
Send signal on trailing edge of PSCOUTnB (match with OCRnRB or
fault/retrigger on part B)
PSYNC21
R/W
5
0
PSYNC20
R/W
4
0
PSYNC11
R/W
3
0
PSYNC10
R/W
2
0
PSYNC01
R/W
1
0
PSYNC00
R/W
0
0
7647G–AVR–09/11
PSYNC
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