ATmega16M1 Atmel Corporation, ATmega16M1 Datasheet - Page 142

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ATmega16M1

Manufacturer Part Number
ATmega16M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16M1

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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17.9
17.9.1
17.9.1.1
142
PSC Input
ATmega16M1/32M1/64M1
PSC Input Configuration
Filter Enable
For detailed information on the PSC, please refer to Application Note ‘AVR138: PSC Cookbook’,
available on the Atmel web site.
Each module 0, 1 and 2 of PSC has its own system to take into account one PSC input. Accord-
ing to PSC Module n Input Control Register.
Register” on page 150.
Each block A or B is also configured by this PSC Module n Input Control Register (PMICn).
Figure 17-10. PSC Input Module
The PSC Input Configuration is done by programming bits in configuration registers.
If the “Filter Enable” bit is set, a digital filter of 4 cycles is inserted before evaluation of the signal.
The disable of this function is mainly needed for prescaled PSC clock sources, where the noise
cancellation gives too high latency.
Important: If the digital filter is active, the level sensitivity is true also with a disturbed PSC clock
to deactivate the outputs (emergency protection of external component). Likewise when used as
fault input, PSC Module n Input A or Input B have to go through PSC to act on PSCOUTn0/1/2
outputs. This way needs that CLK
trol bit (PAOCnA/B), PSCINn input can desactivate directly the PSC outputs. Notice that in this
case, input is still taken into account as usually by Input Module System as soon as CLK
running.
PSCINn
Analog
Comparator
n Output
PISELnA
(PISELnB)
0
1
PELEVnA /
(PELEVnB)
PSCINn input can act has a Retrigger or Fault input.
PRFMnA3:0
(PRFMnB3:0)
PCAEnA
(PCAEnB)
Digital
Filter
CLK
PSC
PSC
PAOCnA
(PAOCnB)
is running. So thanks to PSC Asynchronous Output Con-
PFLTEnA
(PFLTEnB)
0
1
CLK
CLK
2
4
PSC
PSC
See “PMICn – PSC Module n Input Control
Input
Processing
(retriggering ...)
MPSC Core
(Counter,
Waveform
Generator, ...)
Control
of the
6 outputs
8209D–AVR–11/10
PSCOUTnA
PSCOUTnB
PSC
is

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