ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 260

• Manufacturer Part Number: ATmega16A
• Manufacturer: Atmel Corporation

Specifications of ATmega16A

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.8.10
25.8.11
25.8.12
260
ATmega16A
Preventing Flash Corruption
Programming Time for Flash when using SPM
Simple Assembly Code Example for a Boot Loader
the value of the Fuse High bits (FHB) will be loaded in the destination register as shown below.
Refer to
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
low for the CPU and the Flash to operate properly. These issues are the same as for board level
systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
The Calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 25-5.
Bit
Rd
Symbol
Flash write (Page Erase, Page Write,
and write Lock bits by SPM)
1. If there is no need for a Boot Loader update in the system, program the Boot Loader
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
3. Keep the AVR core in Power-down Sleep mode during periods of low V
Lock bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low V
can be used. If a reset occurs while a write operation is in progress, the write operation
will be completed provided that the power supply voltage is sufficient.
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCR Register and thus the Flash from unintentional writes.
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z pointer
;-error handling is not included
;-the routine must be placed inside the boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during self-programming (page erase and page write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
Table 26-3 on page 265
SPM Programming Time.
FHB7
7
CC,
FHB6
the Flash program can be corrupted because the supply voltage is too
6
for detailed description and mapping of the Fuse High bits.
FHB5
5
Min Programming Time
FHB4
4
3.7 ms
FHB3
3
FHB2
Table 25-5
2
CC
Reset Protection circuit
Max Programming Time
FHB1
1
shows the typical pro-
CC
4.5 ms
. This will pre-
FHB0
0
8154B–AVR–07/09