ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 245

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ATmega16A

Manufacturer Part Number
ATmega16A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16A

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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24.6
8154B–AVR–07/09
Boundary-scan Order
Table 24-8
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The
scan order follows the pin-out order as far as possible. Therefore, the bits of Port A is scanned in
the opposite bit order of the other ports. Exceptions from the rules are the Scan chains for the
analog circuits, which constitute the most significant bits of the scan chain regardless of which
physical pin they are connected to. In
corresponds to FF1, and PXn. Pullup_enable corresponds to FF2. Bit 2, 3, 4, and 5 of Port C is
not in the scan chain, since these pins constitute the TAP pins when the JTAG is enabled.
Table 24-8.
Bit Number
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
shows the scan order between TDI and TDO when the Boundary-scan chain is
ATmega16A Boundary-scan Order
Signal Name
AC_IDLE
ACO
ACME
ACBG
COMP
PRIVATE_SIGNAL1
ACLK
ACTEN
PRIVATE_SIGNAL2
ADCBGEN
ADCEN
AMPEN
DAC_9
DAC_8
DAC_7
DAC_6
DAC_5
DAC_4
DAC_3
DAC_2
DAC_1
DAC_0
EXTCH
G10
G20
GNDEN
HOLD
IREFEN
MUXEN_7
(1)
(2)
Figure
24-3, PXn. Data corresponds to FF0, PXn. Control
Module
Comparator
ADC
ATmega16A
245

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