ATmega128RZAV Atmel Corporation, ATmega128RZAV Datasheet - Page 85
ATmega128RZAV
Manufacturer Part Number
ATmega128RZAV
Description
Manufacturer
Atmel Corporation
Specifications of ATmega128RZAV
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
No
External Pa Control
No
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
16.0
Transmit Current Consumption (ma)
17.0
Link Budget (dbm)
104
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2549N–AVR–05/11
Table 13-13. Overriding Signals for Alternate Functions PD7:PD4
Table 13-14. Overriding Signals for Alternate Functions in PD3:PD0
Note:
Signal Name
Signal Name
DIEOE
DIEOV
DDOE
PUOE
PUOV
DDOV
PVOE
PVOV
DIEOE
DIEOV
DDOE
PUOE
PUOV
DDOV
PVOE
PVOV
AIO
AIO
DI
DI
1. When enabled, the 2-wire Serial Interface enables Slew-Rate controls on the output pins PD0
and PD1. This is not shown in this table. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
PD3/INT3/TXD1
INT3 ENABLE
INT3 INPUT
T0 INPUT
PD7/T0
TXEN1
TXEN1
TXEN1
TXD1
0
0
0
0
0
0
0
0
–
0
1
–
1
ATmega640/1280/1281/2560/2561
T1 INPUT
PD6/T1
INT2 INPUT/RXD1
PD2/INT2/RXD1
PORTD2 • PUD
INT2 ENABLE
0
0
0
0
0
0
0
0
–
RXEN1
RXEN1
0
0
0
1
–
XCK1 OUTPUT ENABLE
XCK1 OUTPUT ENABLE
XCK1 OUTPUT
XCK1 INPUT
PD5/XCK1
PORTD1 • PUD
PD1/INT1/SDA
INT1 ENABLE
INT1 INPUT
SDA INPUT
SDA_OUT
0
0
1
0
0
–
TWEN
TWEN
TWEN
0
1
(1)
PORTD0 • PUD
PD0/INT0/SCL
INT0 ENABLE
INT0 INPUT
SCL INPUT
SCL_OUT
ICP1 INPUT
TWEN
TWEN
TWEN
PD4/ICP1
0
1
0
0
0
0
0
0
0
0
–
85
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