ATmega128RZAV Atmel Corporation, ATmega128RZAV Datasheet - Page 415
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ATmega128RZAV
Manufacturer Part Number
ATmega128RZAV
Description
Manufacturer
Atmel Corporation
Specifications of ATmega128RZAV
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
No
External Pa Control
No
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
16.0
Transmit Current Consumption (ma)
17.0
Link Budget (dbm)
104
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Notes:
2549N–AVR–05/11
0x0D (0x2D)
0x0C (0x2C)
0x1A (0x3A)
0x0E (0x2E)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis-
should never be written.
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
ters as data space using LD and ST instructions, $20 must be added to these addresses. The
ATmega640/1280/1281/2560/2561 is a complex microcontroller with more peripheral units than can be supported within the
64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from $60 - $1FF in SRAM, only
the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
DDRG
DDRE
DDRD
DDRC
DDRB
DDRA
TIFR5
TIFR4
TIFR3
TIFR2
TIFR1
TIFR0
DDRF
PING
PINF
PINE
PIND
PINC
PINB
PINA
PORTF7
PORTE7
PORTD7
PORTC7
PORTB7
PORTA7
Bit 7
PINF7
PINE7
PIND7
PINC7
PINB7
PINA7
DDF7
DDE7
DDD7
DDC7
DDB7
DDA7
-
-
-
-
-
-
-
-
-
PORTF6
PORTE6
PORTD6
PORTC6
PORTB6
PORTA6
Bit 6
PINF6
PINE6
PIND6
PINC6
PINB6
PINA6
DDF6
DDE6
DDD6
DDC6
DDB6
DDA6
-
-
-
-
-
-
-
-
-
PORTG5
PORTF5
PORTE5
PORTD5
PORTC5
PORTB5
PORTA5
PING5
PIND5
PINC5
Bit 5
DDG5
PINF5
PINE5
PINB5
PINA5
DDF5
DDE5
DDD5
DDC5
DDB5
DDA5
ICF5
ICF4
ICF3
ICF1
-
-
PORTG4
PORTF4
PORTE4
PORTD4
PORTC4
PORTB4
PORTA4
Bit 4
PING4
PIND4
PINC4
PINB4
PINA4
DDG4
PINF4
PINE4
DDD4
DDC4
DDF4
DDE4
DDB4
DDA4
-
-
-
-
-
-
ATmega640/1280/1281/2560/2561
PORTG3
PORTF3
PORTE3
PORTD3
PORTC3
PORTB3
PORTA3
OCF5C
OCF4C
OCF3C
OCF1C
Bit 3
PING3
PIND3
PINC3
PINB3
PINA3
DDG3
PINF3
PINE3
DDD3
DDC3
DDF3
DDE3
DDB3
DDA3
-
-
PORTG2
PORTC2
PORTF2
PORTE2
PORTD2
PORTB2
PORTA2
OCF5B
OCF4B
OCF3B
OCF2B
OCF1B
OCF0B
Bit 2
PING2
PINE2
PIND2
PINC2
PINB2
PINA2
DDG2
PINF2
DDD2
DDC2
DDF2
DDE2
DDB2
DDA2
PORTG1
PORTF1
PORTE1
PORTD1
PORTC1
PORTB1
PORTA1
OCF5A
OCF4A
OCF3A
OCF2A
OCF1A
OCF0A
PING1
PIND1
PINC1
Bit 1
DDG1
PINF1
PINE1
DDD1
DDC1
PINB1
PINA1
DDF1
DDE1
DDB1
DDA1
PORTG0
PORTE0
PORTD0
PORTC0
PORTB0
PORTA0
PORTF0
PING0
Bit 0
DDG0
PINF0
PINE0
PIND0
PINC0
PINB0
PINA0
TOV5
TOV4
TOV3
TOV2
TOV1
TOV0
DDF0
DDE0
DDD0
DDC0
DDB0
DDA0
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