ATmega128RZAV Atmel Corporation, ATmega128RZAV Datasheet - Page 63
ATmega128RZAV
Manufacturer Part Number
ATmega128RZAV
Description
Manufacturer
Atmel Corporation
Specifications of ATmega128RZAV
Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
54
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
No
External Pa Control
No
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
16.0
Transmit Current Consumption (ma)
17.0
Link Budget (dbm)
104
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12.4
12.4.1
12.4.2
2549N–AVR–05/11
Watchdog Timer
Features
Overview
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
•
•
•
•
Figure 12-7. Watchdog Timer
ATmega640/1280/1281/2560/2561 has an Enhanced Watchdog Timer (WDT). The WDT is a
timer counting cycles of a separate on-chip 128kHz oscillator. The WDT gives an interrupt or a
system reset when the counter reaches a given time-out value. In normal operation mode, it is
required that the system uses the WDR - Watchdog Timer Reset - instruction to restart the coun-
ter before the time-out value is reached. If the system doesn't restart the counter, an interrupt or
system reset will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security, altera-
Clocked from separate On-chip Oscillator
3 Operating modes
Selectable Time-out period from 16ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
WATCHDOG
RESET
OSCILLATOR
128 kHz
WDIF
WDIE
WDE
ATmega640/1280/1281/2560/2561
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
63
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