AT90PWM216 Atmel Corporation, AT90PWM216 Datasheet - Page 264
AT90PWM216
Manufacturer Part Number
AT90PWM216
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM216
Flash (kbytes)
16 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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22.4.2.2
7710F–AVR–09/11
DALA = 1
To work with the 10-bit DAC, two registers have to be updated. In order to avoid intermediate
value, the DAC input values which are really converted into analog signal are buffering into
unreachable registers. In normal mode, the update of the shadow register is done when the reg-
ister DACH is written.
In case DAATE bit is set, the DAC input values will be updated on the trigger event selected
through DATS bits.
In order to avoid wrong DAC input values, the update can only be done after having written
respectively DACL and DACH registers. It is possible to work on 8-bit configuration by only writ-
ing the DACH value. In this case, update is done each trigger event.
In case DAATE bit is cleared, the DAC is in an automatic update mode. Writing the DACH regis-
ter automatically update the DAC input values with the DACH and DACL register values.
It means that whatever is the configuration of the DAATE bit, changing the DACL register has no
effect on the DAC output until the DACH register has also been updated. So, to work with 10
bits, DACL must be written first before DACH. To work with 8-bit configuration, writing DACH
allows the update of the DAC.
Bit
Read/Write
Initial Value
DAC9
DAC1
R/W
R/W
7
0
0
DAC8
DAC0
R/W
R/W
6
0
0
DAC7
R/W
R/W
5
0
0
-
DAC6
R/W
R/W
4
0
0
-
DAC5
R/W
R/W
3
0
0
-
DAC4
AT90PWM216/316
R/W
R/W
2
0
0
-
DAC3
R/W
R/W
1
0
0
-
DAC2
R/W
R/W
0
0
0
-
DACH
DACL
264
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