AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 83
AT89LP3240
Manufacturer Part Number
AT89LP3240
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT89LP3240.pdf
(200 pages)
Specifications of AT89LP3240
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
38
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
4.25
Eeprom (bytes)
8192
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 3.6
Timers
3
Isp
SPI/OCD
Watchdog
Yes
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15. General-purpose Interrupts
Figure 15-1. GPI Block Diagram
3706C–MICRO–2/11
(P1.7) GPI7
(P1.6) GPI6
(P1.5) GPI5
(P1.4) GPI4
(P1.3) GPI3
(P1.2) GPI2
(P1.1) GPI1
(P1.0) GPI0
another interrupt will be generated. Both INT0 and INT1 may wake up the device from the
Power-down state.
The General-purpose Interrupt (GPI) function provides 8 configurable external interrupts on
Port 1. Each port pin can detect high/low levels or positive/negative edges. The GPIEN register
select which bits of Port 1 are enabled to generate an interrupt. The GPMOD and GPLS regis-
ters determine the mode for each individual pin. GPMOD selects between level-sensitive and
edge-triggered mode. GPLS selects between high/low in level mode and positive/negative in
edge mode. A block diagram is shown in
clock cycle. In level-sensitive mode, a valid level must appear in two successive samples before
generating the interrupt. In edge-triggered mode, a transition will be detected if the value
changes from one sample to the next. When an interrupt condition on a pin is detected, and that
pin is enabled, the appropriate flag in the GPIF register is set. The flags in GPIF must be cleared
by software. Any GPI interrupt may wake up the device from the Power-down state.
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
GPLS
7
6
5
4
3
2
1
0
GPMOD
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
GPIEN
CLK
Figure
D Q
D Q
D Q
D Q
D Q
D Q
D Q
D Q
GPIF
15-1. The pins of Port 1 are sampled every
7
6
5
4
3
2
1
0
AT89LP3240/6440
Interrupt
83
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