AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 116

• Manufacturer Part Number: AT89LP3240
• Manufacturer: Atmel Corporation

Specifications of AT89LP3240

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 38
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 4.25
• Eeprom (bytes): 8192
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 3.6
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

18.6.1
116
AT89LP3240/6440
Master Transmitter Mode
SLA: Slave Address
In
bers in the circles show the status code held in TWSR. At these points, actions must be taken by
the application to continue or complete the TWI transfer. The TWI transfer is suspended until the
TWIF flag is cleared by software.
When the TWIF flag is set, the status code in TWSR is used to determine the appropriate soft-
ware action. For each status code, the required software action and details of the following serial
transfer are given in
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave Receiver. In
order to enter a Master mode, a START condition must be transmitted. The format of the follow-
ing address packet determines whether Master Transmitter or Master Receiver mode is to be
entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is transmitted, MR mode is
entered.
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the Two-wire Serial Interface, STA must be written to one to trans-
mit a START condition and TWIF must be cleared. The TWI will then test the Two-wire Serial
Bus and generate a START condition as soon as the bus becomes free. After a START condi-
tion has been transmitted, the TWIF flag is set by hardware, and the status code in TWSR will be
08h (see
writing SLA+W to TWDR. Thereafter the TWIF bit should be cleared to continue the transfer.
When SLA+W has been transmitted and an acknowledgment bit has been received, TWIF is set
again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 18h, 20h, or 38h. The appropriate action to be taken for each of these status codes is
detailed in
After SLA+W has been successfully transmitted, a data packet should be transmitted. This is
done by writing the data byte to TWDR. TWDR must only be written when TWIF is high. If not,
the access will be discarded and the previous value will be transmitted. After updating TWDR,
the TWIF bit should be cleared to continue the transfer. This scheme is repeated until the last
byte has been sent and the transfer is ended by generating a STOP condition or a repeated
START condition. A STOP condition is generated by writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
After a repeated START condition (status 10h) the Two-wire Serial Interface can access the
same slave again, or a new slave without transmitting a STOP condition. Repeated START
enables the master to switch between slaves, Master Transmitter mode and Master Receiver
mode without losing control of the bus.
TWCR
Value
TWCR
Value
TWCR
Value
Figure 18-11
Table
Table
X
X
X
–
–
–
18-6). In order to enter MT mode, SLA+W must be transmitted. This is done by
to
18-6.
Figure
Table 18-6
TWEN
TWEN
TWEN
1
1
1
18-14, circles are used to indicate that the TWIF flag is set. The num-
to
STA
STA
STA
1
0
1
Table
18-9.
STO
STO
STO
0
1
0
TWIF
TWIF
TWIF
0
0
0
AA
AA
AA
X
X
X
–
X
–
X
–
X
3706C–MICRO–2/11
–
X
–
X
–
X