AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 126

• Manufacturer Part Number: AT89LP3240
• Manufacturer: Atmel Corporation

Specifications of AT89LP3240

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 38
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 4.25
• Eeprom (bytes): 8192
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 3.6
• Timers: 3
• Isp: SPI/OCD
• Watchdog: Yes

19. Dual Analog Comparators
Figure 19-1. Dual Comparator Block Diagram
126
(P2.7) AIN3
(P2.6) AIN2
(P2.5) AIN1
(P2.4) AIN0
AT89LP3240/6440
Figure 18-15. Combining Several TWI Modes to Access a Serial EEPROM
The AT89LP3240/6440 provides two analog comparators. The analog comparators have the fol-
lowing features:
A block diagram of the dual analog comparators with relevant connections is shown in
19-1. Input options allow the comparators to function in a number of different configurations as
shown in
tive input is greater than the negative input. Otherwise the output is a zero. Setting the CENA
(ACSRA.3) and CENB (ACSRB.3) bits enable Comparator A and B respectively. The user must
• Internal 3-level Voltage Reference (1.2V, 1.3V, 1.4V)
• Four Shared Analog Input Channels
• Selectable Interrupt Conditions
• Hardware Debouncing Modes
S
– Configure as Multiple Input Window Comparator
– High- or Low-level
– Rising- or Falling-edge
– Output Toggle
S = START
Figure
CSB1
CSA1
Transmitted from master to slave
CSB0
CSA0
SLA+W
11
10
01
00
00
01
10
11
19-4. Comparator operation is such that the output is a logic “1” when the posi-
A
Master Transmitter
11
10
01
00
00
01
10
11
ADDRESS
RFB1
RFA1
RFB0
RFA0
B
A
V
V
V
AREF+Δ
AREF
AREF-Δ
A
Rs = REPEATED START
CMB2
CMB1
CMB0
CMA2
CMA1
CMA0
Rs
Transmitted from slave to master
SLA+R
CFB
CFA
A
CMPB (P4.7)
CMPA (P4.6)
Master Receiver
EC
DATA
3706C–MICRO–2/11
P = STOP
Interrupt
A
P
Figure