AT89C51IC2 Atmel Corporation, AT89C51IC2 Datasheet - Page 98

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AT89C51IC2

Manufacturer Part Number
AT89C51IC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51IC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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98
(SSCS)
Status
Code
C0h
C8h
AT89C51IC2
Status of the 2-wire bus and
been transmitted (AA=0); ACK
Data byte in SSDAT has been
Last data byte in SSDAT has
transmitted; NOT ACK has
has been received
2-wire hardware
been received
Table 72.
(SSCS)
Status
Code
F8h
00h
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action
No SSDAT action
To/from SSDAT
Status of the 2-wire
Bus error due to an
Miscellaneous status
No relevant state
Application Software Response
bus and 2-wire
illegal START or
STOP condition
available; SI= 0
information
hardware
STA
0
0
1
1
0
0
1
1
To SSCON
No SSDAT
No SSDAT
STO
Application Software Response
To/from
SSDAT
action
action
0
0
0
0
0
0
0
0
SI
0
0
0
0
0
0
0
0
STA STO
AA
0
0
1
0
1
0
1
0
1
No SSCON action
To SSCON
Next Action Taken By 2-wire Software
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START
condition will be transmitted when the bus
becomes free
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1. A START condition will be transmitted
when the bus becomes free
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START
condition will be transmitted when the bus
becomes free
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1. A START condition will be transmitted
when the bus becomes free
1
SI
0
AA
X
Next Action Taken By 2-wire
Software
Wait or proceed current transfer
Only the internal hardware is
affected, no STOP condition is
sent on the bus. In all cases,
the bus is released and STO is
reset.
4301D–8051–02/08

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