AT89C51IC2 Atmel Corporation, AT89C51IC2 Datasheet - Page 25

• Manufacturer Part Number: AT89C51IC2
• Manufacturer: Atmel Corporation

Specifications of AT89C51IC2

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 1.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

Dual Data Pointer
Register
Figure 7. Use of Dual Pointer
4301D–8051–02/08
7
AUXR1(A2H)
DPS
0
The additional data pointer can be used to speed up code execution and reduce code
size.
The dual DPTR structure is a way by which the chip will specify the address of an exter-
nal data memory location. There are two 16-bit DPTR registers that address the external
memory, and a single bit called DPS = AUXR1.0 (see Table 21) that allows the program
code to switch between them (Refer to Figure 7).
Table 21. AUXR1 register
AUXR1- Auxiliary Register 1(0A2h)
Reset Value: XXXX XX0X0b
Not bit addressable
Note:
Number
Bit
7
-
7
6
5
4
3
2
1
0
*Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
DPH(83H) DPL(82H)
Mnemonic Description
ENBOOT
DPS
GF3
Bit
6
-
0
-
-
-
-
DPTR1
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot rom.
Set to map the boot rom between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general purpose user flag.*
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPTR0
5
4
-
GF3
3
External Data Memory
2
0
1
-
DPS
0
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