AT89C51IC2 Atmel Corporation, AT89C51IC2 Datasheet - Page 97

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AT89C51IC2

Manufacturer Part Number
AT89C51IC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51IC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Figure 41. Format and State in the Slave Transmitter Mode
4301D–8051–02/08
(SSCS)
Status
Code
A8h
B0h
B8h
Reception of the
own slave address
and one or more
data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (AA=0)
Status of the 2-wire bus and
Arbitration lost in SLA+R/W as
master; own SLA+R has been
Data byte in SSDAT has been
transmitted; NOT ACK has
received; ACK has been
received; ACK has been
Own SLA+R has been
2-wire hardware
From master to slave
From slave to master
been received
returned
returned
S
Table 71. Status in slave transmitter mode
SLA
Load data byte or
Load data byte or
Load data byte or
To/from SSDAT
Load data byte
Load data byte
Load data byte
Application Software Response
R
Data
n
B0h
A8h
A
A
STA
X
X
X
X
X
X
A
To SSCON
STO
Data
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
0
0
0
0
0
0
SI
0
0
0
0
0
0
B8h
AA
A
0
1
0
1
0
1
Next Action Taken By 2-wire Software
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Data
C8h
C0h
A
A
All 1’s
P or S
P or S
97

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