AT89C51IC2 Atmel Corporation, AT89C51IC2 Datasheet - Page 110

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AT89C51IC2

Manufacturer Part Number
AT89C51IC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51IC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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110
AT89C51IC2
Table 86. Default Values
After programming the part by ISP, the BSB must be cleared (00h) in order to allow the
application to boot at 0000h.
The content of the Software Security Byte (SSB) is described in Table 86 and Table 88.
To assure code protection from a parallel access, the HSB must also be at the required
level.
Table 87. Software Security Byte
The two lock bits provide different levels of protection for the on-chip code and data,
when programmed as shown in Table 88.
Mnemonic
Number
Bit
SBV
HSB
BSB
SSB
1-0
7
-
7
6
5
4
3
2
Mnemonic Description
Definition
Software Boot Vector
Hardware security Byte
Boot Status Byte
Software Security Byte
Copy of the Manufacturer Code
Copy of the Device ID #1: Family Code
Copy of the Device ID #2: memories
Copy of the Device ID #3: name and
revision
LB1-0
Bit
6
-
-
-
-
-
-
-
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
User Memory Lock Bits
see Table 88
5
-
4
-
3
-
Default value
101x 1011b
0FFh
FCh
D7h
EFh
FFh
F7h
58h
2
-
Description
ATMEL
C51 X2, Electrically Erasable
AT89C51IC2 32KB
AT89C51IC2 32KB, Revision
0
LB1
1
4301D–8051–02/08
LB0
0

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