AT89C51IC2 Atmel Corporation, AT89C51IC2 Datasheet - Page 29

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AT89C51IC2

Manufacturer Part Number
AT89C51IC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51IC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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4301D–8051–02/08
Table 23. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX0X 00’HSB.XRAM’0b
Not bit addressable
Number
Bit
7
-
7
6
5
4
3
2
1
0
Mnemonic Description
EXTRAM
XRS1
XRS0
Bit
AO
M0
6
-
-
-
-
Reserved
Reserved
Pulse length
Cleared to stretch MOVX control: the RD/ and the WR/ pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD/ and the WR/ pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit
XRAM Size
XRS1
0
0
1
1
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.
The value read from this bit is indeterminate. Do not set this bit
The value read from this bit is indeterminate. Do not set this bit
M0
5
0
1
0
1
XRS0
4
-
XRAM size
256 bytes (default)
512 bytes
768 bytes
1024 bytes
XRS1
3
XRS0
2
EXTRAM
1
AO
0
29

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