AT32UC3C1128C Atmel Corporation, AT32UC3C1128C Datasheet - Page 335
AT32UC3C1128C
Manufacturer Part Number
AT32UC3C1128C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C1128C
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C1128C-AUR
Manufacturer:
ATMEL
Quantity:
870
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3C0128C PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
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18.6.8
18.6.8.1
Figure 18-30. Read and Write Cycles in Slow Clock Mode
32117C–AVR-08/11
NBS0, NBS1,
A[AD_MSB:2]
A0, A1
CLK_SMC
NWE
NCS
Slow Clock Mode
Slow clock mode waveforms
SLOW CLOCK MODE WRITE
1
NWECYCLES = 3
The SMC is able to automatically apply a set of “slow clock mode” read/write waveforms when
an internal signal driven by the SMC’s Power Management Controller is asserted because
CLK_SMC has been turned to a very slow clock rate (typically 32 kHz clock rate). In this mode,
the user-programmed waveforms are ignored and the slow clock mode waveforms are applied.
This mode is provided so as to avoid reprogramming the User Interface with appropriate wave-
forms at very slow clock rate. When activated, the slow mode is active on all chip selects.
Figure 18-30 on page 335
valid on all chip selects.
ters in slow clock mode.
Table 18-5.
Read Parameters
NRDSETUP
NRDPULSE
NCSRDSETUP
NCSRDPULSE
NRDCYCLE
1
Read and Write Timing Parameters in Slow Clock Mode
1
Duration (cycles)
Table 18-5 on page 335
illustrates the read and write operations in slow clock mode. They are
1
1
0
2
2
Write Parameters
NWESETUP
NWEPULSE
NCSWRSETUP
NCSWRPULSE
NWECYCLE
NBS0, NBS1,
A[AD_MSB:2]
indicates the value of read and write parame-
A0, A1
CLK_SMC
NRD
NCS
SLOW CLOCK MODE READ
NRDCYCLES = 2
1
Duration (cycles)
AT32UC3C
1
1
0
3
3
1
335
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