AT32UC3A4128S Atmel Corporation, AT32UC3A4128S Datasheet - Page 925
AT32UC3A4128S
Manufacturer Part Number
AT32UC3A4128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4128S
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
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- Download datasheet (16Mb)
34.3.6.1
32072G–11/2011
trace operation
Debug tools utilizing the AUX port should connect to the device through a Nexus-compliant Mic-
tor-38 connector, as described in the AVR32UC Technical Reference manual. This connector
includes the JTAG signals and the RESET_N pin, giving full access to the programming and
debug features in the device.
Table 34-5.
Figure 34-3. AUX+JTAG based Debugger
Trace features are enabled by writing OCD registers by JTAG. The OCD extracts the trace infor-
mation from the CPU, compresses this information and formats it into variable-length messages
according to the Nexus standard. The messages are buffered in a 16-frame transmit queue, and
are output on the AUX port one frame at a time.
Signal
MCKO
MDO[5:0]
MSEO[1:0]
EVTI_N
EVTO_N
Auxiliary Port Signals
Direction
Output
Output
Output
Output
Input
T r a c e b u f f e r
h i g h s p e e d
Description
Trace data output clock
Trace data output
Trace frame control
Event In
Event Out
A U X
M i c t o r 3 8
A V R 3 2
P C
A U X + J T A G
d e b u g t o o l
J T A G
925
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